void oper_flash_read_id(void* data)
/*                                                                           */
/* INPUTS  : o data    Point to a variable to read the  ID                   */
/* OUTPUTS : o data    The ID is stored in data                              */
/* RETURNS : o ---                                                           */
/* DESCRIPTION:                                                              */
/*     Only reads the manufacturer and part number codes for the first       */
/* device(s) in series. It is assumed that any devices in series             */
/* will be of the same type.                                                 */
/* $rtn_hdr_end                                                              */
/*****************************************************************************/
{
#ifndef HAVE_SERIAL_FLASH
    typedef void c_fun(void*);
    c_fun *_flash_query;
#ifndef IROSBOOT
    unsigned long cur_interrupt_state;
    HAL_FLASH_CACHES_STATE(d_cache, i_cache);
#endif

    _flash_query = (c_fun*) __anonymizer(&flash_query);
#ifndef IROSBOOT
    HAL_DISABLE_INTERRUPTS(cur_interrupt_state);
    HAL_FLASH_CACHES_OFF(d_cache, i_cache);
#endif
    (*_flash_query)(data);
#ifndef IROSBOOT
    HAL_FLASH_CACHES_ON(d_cache, i_cache);
    HAL_RESTORE_INTERRUPTS(cur_interrupt_state);
#endif
#else
    flash_query(data);
#endif /* HAVE_SERIAL_FLASH */
    return;
}

int oper_flash_unlock_block(void* block)
/*                                                                           */
/* INPUTS  : o block       Block start address                               */
/* OUTPUTS : ----                                                            */
/* RETURNS : o Status of unlock operation                                    */
/* DESCRIPTION:                                                              */
/*     This function will unlock the blocks.                                 */
/* $rtn_hdr_end                                                              */
/*****************************************************************************/
{
    int stat = 0;
#ifndef HAVE_SERIAL_FLASH
    typedef int c_fun(unsigned short *, int, int);
    c_fun *_flash_unlock_block;
#ifndef IROSBOOT
    unsigned long cur_interrupt_state;
    HAL_FLASH_CACHES_STATE(d_cache, i_cache);
#endif

    _flash_unlock_block = (c_fun*) __anonymizer(&flash_unlock_block);
#ifndef IROSBOOT
    HAL_DISABLE_INTERRUPTS(cur_interrupt_state);
    HAL_FLASH_CACHES_OFF(d_cache, i_cache);
#endif
    stat = (*_flash_unlock_block)(block, flash_dev_info->block_size, 0x1);
#ifndef IROSBOOT
    HAL_FLASH_CACHES_ON(d_cache, i_cache);
    HAL_RESTORE_INTERRUPTS(cur_interrupt_state);
#endif
#endif /* HAVE_SERIAL_FLASH */

    return stat;
}

int oper_flash_write(void* addr, int data)
/*                                                                           */
/* INPUTS  : o addr         Address to which data to be written              */
/*           o data         Data that need to be written                     */
/* OUTPUTS : ----                                                            */
/* RETURNS : o Status of the write operation                                 */
/* DESCRIPTION:                                                              */
/*     This function writes the data to the flash                            */
/*     THIS FUNCTION CONSIDERES THE BLOCK IN UNLOCKED                        */
/*     WRITE ONLY 2 BYTE                                                     */
/* $rtn_hdr_end                                                              */
/*****************************************************************************/
{
    int stat = 0;
#ifndef IROSBOOT
    unsigned long cur_interrupt_state;
    HAL_FLASH_CACHES_STATE(d_cache, i_cache);
    HAL_DISABLE_INTERRUPTS(cur_interrupt_state);
    HAL_FLASH_CACHES_OFF(d_cache, i_cache);
#endif
#ifdef HAVE_SERIAL_FLASH
    flash_program_buf_word(addr,(cs_uint32)data);
#else
    typedef int c_fun(void *, int);
    c_fun *_flash_program_buf_word;
    _flash_program_buf_word = (c_fun*) __anonymizer(&flash_program_buf_word);
    stat = (*_flash_program_buf_word)(addr, data);
#endif /* HAVE_SERIAL_FLASH */
#ifndef IROSBOOT
    HAL_FLASH_CACHES_ON(d_cache, i_cache);
    HAL_RESTORE_INTERRUPTS(cur_interrupt_state);
#endif
    return stat;
}

int oper_flash_erase_block(void* block)
/*                                                                           */
/* INPUTS  : o block       Block address                                     */
/* OUTPUTS : ----                                                            */
/* RETURNS : o ---                                                           */
/* DESCRIPTION:                                                              */
/*     This function is used to erase a block                                */
/* $rtn_hdr_end                                                              */
/*****************************************************************************/
{
    int stat = 0;
#ifndef IROSBOOT
    unsigned long cur_interrupt_state;
    HAL_FLASH_CACHES_STATE(d_cache, i_cache);
    HAL_DISABLE_INTERRUPTS(cur_interrupt_state);
    HAL_FLASH_CACHES_OFF(d_cache, i_cache);
#endif
#ifdef HAVE_SERIAL_FLASH
    flash_erase_block((cs_uint32)block,0);
#else
    typedef int c_fun(unsigned short *, unsigned int);
    c_fun *_flash_erase_block;

    _flash_erase_block = (c_fun*) __anonymizer(&flash_erase_block);
    stat = (*_flash_erase_block)(block, flash_dev_info->block_size);
#endif /* HAVE_SERIAL_FLASH */
#ifndef IROSBOOT
    HAL_FLASH_CACHES_ON(d_cache, i_cache);
    HAL_RESTORE_INTERRUPTS(cur_interrupt_state);
#endif
    return stat;
}

void hal_diag_write_char_serial( char c )
{
    unsigned long __state;
    HAL_DISABLE_INTERRUPTS(__state);
    cyg_hal_plf_serial_putc(c);
    HAL_RESTORE_INTERRUPTS(__state);
}

void cyg_hal_interrupt_unmask( cyg_uint32 vector)
{
    cyg_uint32 reg, _old;
    
    /* done to void race conditions */
    HAL_DISABLE_INTERRUPTS(_old);
    
    switch (vector)
        {
        case CYGNUM_HAL_INTERRUPT_SIO_0:
            HAL_WRITE_UINT32(INTR_COM0_REG, 1);
            HAL_READ_UINT32(INTR_MASK_REG, reg);
            HAL_WRITE_UINT32(INTR_MASK_REG, (reg | ((1 << SERIAL_PORT0_GROUP))));
            break;

        case CYGNUM_HAL_INTERRUPT_SIO_1:
            HAL_WRITE_UINT32(INTR_COM1_REG, 1);
            HAL_READ_UINT32(INTR_MASK_REG, reg);
            HAL_WRITE_UINT32(INTR_MASK_REG, (reg | ((1 << SERIAL_PORT1_GROUP))));
            break;

        default:
            HAL_INTERRUPT_UNMASK_CPU(vector);
	}

    HAL_RESTORE_INTERRUPTS(_old);
    return;
}

static void call_dsrs(void)
{
    CYG_REPORT_FUNCTION();
    
    while( dsr_list != NULL )
    {
        cyg_interrupt *intr;
        cyg_int32 count;
        CYG_INTERRUPT_STATE old_intr;

        HAL_DISABLE_INTERRUPTS(old_intr);
        
        intr = dsr_list;
        dsr_list = intr->next_dsr;
        count = intr->dsr_count;
        intr->dsr_count = 0;
        
        HAL_RESTORE_INTERRUPTS(old_intr);

        intr->dsr( intr->vector, count, (CYG_ADDRWORD)intr->data );
    }

    CYG_REPORT_RETURN();
    
}

void
_mcount(void)
{
    int                 ints_enabled;
    HAL_SMP_CPU_TYPE    this_cpu;
    
    HAL_DISABLE_INTERRUPTS(ints_enabled);

    // This cpu is now not going to run any other code. So, did it
    // already own the spinlock?
    this_cpu = HAL_SMP_CPU_THIS();
    if (mcount_cpu != this_cpu) {
        // Nope, so this cannot be a nested call to mcount()
        HAL_SPINLOCK_SPIN(mcount_lock);
        // And no other cpu is executing inside mcount() either
        mcount_cpu  = this_cpu;
        // A possibly-recursive call is now safe.
        __profile_mcount((CYG_ADDRWORD)__builtin_return_address(1),
                         (CYG_ADDRWORD)__builtin_return_address(0));
        // All done.
        mcount_cpu = HAL_SMP_CPU_NONE;
        HAL_SPINLOCK_CLEAR(mcount_lock);
    }
    
    HAL_RESTORE_INTERRUPTS(ints_enabled);
}

// Note: The "contract" for this function is that the value is the number
// of hardware clocks that have happened since the last interrupt (i.e.
// when it was reset).  This value is used to measure interrupt latencies.
// However, since the hardware counter runs freely, this routine computes
// the difference between the current clock period and the number of hardware
// ticks left before the next timer interrupt.
void hal_clock_read(cyg_uint32 *pvalue)
{
    int orig;
    HAL_DISABLE_INTERRUPTS(orig);
    *pvalue = clock_period + *PXA2X0_OSCR - *PXA2X0_OSMR0;
    HAL_RESTORE_INTERRUPTS(orig);
}

static void time0DI(register cyg_uint32 stride)
{
    register cyg_uint32 j,k;
    volatile cyg_tick_count_t count0;
    cyg_tick_count_t count1;
    cyg_ucount32 t;
    register char c;
    register CYG_INTERRUPT_STATE oldints;

    count0 = cyg_current_time();

    HAL_DISABLE_INTERRUPTS(oldints);
    HAL_DCACHE_SYNC();

    k = 0;
    if ( cyg_test_is_simulator )
        k = 3960;

    for(; k<4000;k++) {
        for(j=0; j<(HAL_DCACHE_SIZE/HAL_DCACHE_LINE_SIZE); j++) {
            HAL_DCACHE_INVALIDATE_ALL();
            c=m[stride*j];
        }
    }
    HAL_RESTORE_INTERRUPTS(oldints);    

    count1 = cyg_current_time();
    t = count1 - count0;
    diag_printf("stride=%d, time=%d\n", stride, t);
}

void hal_diag_write_char(char c)
{
    CYG_INTERRUPT_STATE old;
    HAL_DISABLE_INTERRUPTS(old);
    cyg_hal_plf_serial_putc(0, c);
    HAL_RESTORE_INTERRUPTS(old);
}

int oper_flash_bulk_write(void* _addr, void* _data, int len)
/*                                                                           */
/* INPUTS  : o addr         Address to which data to be written              */
/*           o data         Address of Data that need to be written          */
/*           o len          Length of data hat need to be written            */
/* OUTPUTS : ----                                                            */
/* RETURNS : o Status of the write operation                                 */
/* DESCRIPTION:                                                              */
/*     This function writes the bulk data to the flash                       */
/*     THIS FUNCTION UNLOCKS THE BLOCK FIRST BEFORE IT WRITES                */
/* $rtn_hdr_end                                                              */
/*****************************************************************************/
{
    int stat = 0;
#ifndef IROSBOOT
    unsigned long cur_interrupt_state;
    HAL_FLASH_CACHES_STATE(d_cache, i_cache);
    HAL_DISABLE_INTERRUPTS(cur_interrupt_state);
    HAL_FLASH_CACHES_OFF(d_cache, i_cache);
#endif
#ifdef HAVE_SERIAL_FLASH
    flash_program_buf((cs_uint32)_addr,(cs_uint32)_data,len,0,0);
#else
    int size;
    typedef int c_fun(void *, void *, int, unsigned long, int);
    c_fun *_flash_program_buf;
    unsigned char *addr = (unsigned char *)_addr;
    unsigned char *data = (unsigned char *)_data;
    unsigned long tmp;


    _flash_program_buf = (c_fun*) __anonymizer(&flash_program_buf);

    while (len > 0) {
        size = len;
        if (size > flash_dev_info->block_size) size = flash_dev_info->block_size;

        tmp = (unsigned long) addr & (~flash_dev_info->block_mask);
        if (tmp) {
                tmp = flash_dev_info->block_size - tmp;
                if (size > tmp) size = tmp;
        }

        stat = (*_flash_program_buf)(addr, data, size, flash_dev_info->block_mask, 0x0);
        if (stat != FLASH_ERR_OK) {
            break;
        }
        len -= size;
        addr += size/sizeof(*addr);
        data += size/sizeof(*data);
    }

#endif /* HAVE_SERIAL_FLASH */
#ifndef IROSBOOT
    HAL_FLASH_CACHES_ON(d_cache, i_cache);
    HAL_RESTORE_INTERRUPTS(cur_interrupt_state);
#endif
    return (stat);
}

// Debug routines
void cyg_hal_report_undefined_instruction(HAL_SavedRegisters *frame)
{
    int old;
    HAL_DISABLE_INTERRUPTS(old);
    diag_printf("[UNDEFINED INSTRUCTION] Frame:\n");
    dump_frame((unsigned char *)frame);
    HAL_RESTORE_INTERRUPTS(old);
}

void cyg_hal_report_exception_handler_returned(HAL_SavedRegisters *frame)
{    
    int old;
    HAL_DISABLE_INTERRUPTS(old);
    diag_printf("Exception handler returned!\n");
    dump_frame((unsigned char *)frame);
    HAL_RESTORE_INTERRUPTS(old);
}

void cyg_hal_report_abort_data(HAL_SavedRegisters *frame)
{
    int old;
    HAL_DISABLE_INTERRUPTS(old);
    diag_printf("[ABORT DATA] Frame:\n");
    dump_frame((unsigned char *)frame);
    HAL_RESTORE_INTERRUPTS(old);
}

void cyg_hal_report_software_interrupt(HAL_SavedRegisters *frame)
{
    int old;
    HAL_DISABLE_INTERRUPTS(old);
    diag_printf("[SOFTWARE INTERRUPT] Frame:\n");
    dump_frame((unsigned char *)frame);
    HAL_RESTORE_INTERRUPTS(old);
}

void hal_diag_write_char(char c)
{
#if defined(CYG_KERNEL_DIAG_LCD)
  static volatile CYG_WORD* reg = HAL_DISPLAY_ASCIIPOS0;
#endif

  unsigned long __state;

  HAL_DISABLE_INTERRUPTS(__state);

  if(c == '\n')
    {
#if defined(CYG_KERNEL_DIAG_LCD)
      reg = HAL_DISPLAY_ASCIIPOS0;
      hal_diag_clear_lcd();
#endif
#if defined (CYG_KERNEL_DIAG_SERIAL)
      cyg_hal_plf_serial_putc(NULL, '\r');
      cyg_hal_plf_serial_putc(NULL, '\n');
#endif
    }
  else if (c == '\r')
    {
      // Ignore '\r'
    }
  else
    {
#if defined(CYG_KERNEL_DIAG_LCD)
      if (reg == HAL_DISPLAY_ASCIIPOS0)
        hal_diag_clear_lcd();

      HAL_WRITE_UINT32(reg, c);

      // Advance to next LED position.
      if (reg == HAL_DISPLAY_ASCIIPOS0)
        reg = HAL_DISPLAY_ASCIIPOS1;
      else if (reg == HAL_DISPLAY_ASCIIPOS1)
        reg = HAL_DISPLAY_ASCIIPOS2;
      else if (reg == HAL_DISPLAY_ASCIIPOS2)
        reg = HAL_DISPLAY_ASCIIPOS3;
      else if (reg == HAL_DISPLAY_ASCIIPOS3)
        reg = HAL_DISPLAY_ASCIIPOS4;
      else if (reg == HAL_DISPLAY_ASCIIPOS4)
        reg = HAL_DISPLAY_ASCIIPOS5;
      else if (reg == HAL_DISPLAY_ASCIIPOS5)
        reg = HAL_DISPLAY_ASCIIPOS6;
      else if (reg == HAL_DISPLAY_ASCIIPOS6)
        reg = HAL_DISPLAY_ASCIIPOS7;
      else // reg == HAL_DISPLAY_ASCIIPOS7 or UNKNOWN
        reg = HAL_DISPLAY_ASCIIPOS0;
#endif
#if defined(CYG_KERNEL_DIAG_SERIAL)
      cyg_hal_plf_serial_putc(NULL, c);
#endif
    }

  HAL_RESTORE_INTERRUPTS(__state);
}

void
show_frame_out(HAL_SavedRegisters *frame)
{
    int old;
    HAL_DISABLE_INTERRUPTS(old);
    diag_printf("[OUT] IRQ Frame:\n");
    dump_frame((unsigned char *)frame);
    HAL_RESTORE_INTERRUPTS(old);
}

//
// This function is called to "start up" the interface.  It may be called
// multiple times, even when the hardware is already running.  It will be
// called whenever something "hardware oriented" changes and should leave
// the hardware ready to send/receive packets.
//
static void tsec_eth_start(struct eth_drv_sc *sc, unsigned char *enaddr,
		int flags)
{
	int link = 0, speed100 = 0, full_duplex = 0;
	struct tsec_eth_info *qi = (struct tsec_eth_info *) sc->driver_private;

	os_printf("ETH start\n");

	//if stopped
	if ((qi->tsec->maccfg1 & (MACCFG1_RXEN| MACCFG1_TXEN)) != (MACCFG1_RXEN
			| MACCFG1_TXEN))
	{
		cyg_uint32 int_state;
		HAL_DISABLE_INTERRUPTS(int_state);
		// Initialize DMACTRL
		qi->tsec->dmactrl &= ~(DMACTRL_GRS| DMACTRL_GTS);

		qi->tsec->tstat = TSTAT_TXF;
		qi->tsec->rstat = RSTAT_QHLT | RSTAT_RXF;

		// Unmask interrupt
		qi->tsec->imask = IMASK_DEFAULT;


		if(flags)
		{
			//redo autonegociation
			phyAutoNegociate(qi->phyAddress, &link, &speed100, &full_duplex);
#ifdef CYGNUM_DEVS_ETH_POWERPC_TSEC_LINK_MODE_Auto
			if (!link)
			{
				//the generic driver will set some flags
				(sc->funs->stop)(sc);
			}
			else
#endif
			{
				//set MAC connection parameters
				qi->tsec->maccfg2 = 0x00007000 | MACCFG2_IF_MODE_NIBBLE
						| MACCFG2_PAD_CRC | ((full_duplex) ? MACCFG2_FULL_DUPLEX
						: 0x0);
				qi->tsec->ecntrl = ECNTRL_STEN | ECNTRL_RMM
						| ((speed100) ? ECNTRL_R100M : 0);

				// Enable Rx and Tx
				qi->tsec->maccfg1 |= (MACCFG1_RXEN| MACCFG1_TXEN);
			}
		}
		else
		{
			qi->tsec->maccfg1 |= (MACCFG1_RXEN| MACCFG1_TXEN);
		}
		HAL_RESTORE_INTERRUPTS(int_state);
	}
}

void cyg_drv_spinlock_clear_intsave( cyg_drv_spinlock_t *lock,
                                     cyg_addrword_t istate )
{
    CYG_REPORT_FUNCTION();

    lock->lock = 0;
    
    HAL_RESTORE_INTERRUPTS( istate );
    
    CYG_REPORT_RETURN();
}