本文整理汇总了C++中clk_register_fixed_rate函数的典型用法代码示例。如果您正苦于以下问题:C++ clk_register_fixed_rate函数的具体用法?C++ clk_register_fixed_rate怎么用?C++ clk_register_fixed_rate使用的例子?那么恭喜您, 这里精选的函数代码示例或许可以为您提供帮助。
在下文中一共展示了clk_register_fixed_rate函数的20个代码示例,这些例子默认根据受欢迎程度排序。您可以为喜欢或者感觉有用的代码点赞,您的评价将有助于我们的系统推荐出更棒的C++代码示例。
示例1: vexpress_clk_init
void __init vexpress_clk_init(void __iomem *sp810_base)
{
struct clk *clk;
int i;
clk = clk_register_fixed_rate(NULL, "dummy_apb_pclk", NULL,
CLK_IS_ROOT, 0);
WARN_ON(clk_register_clkdev(clk, "apb_pclk", NULL));
clk = clk_register_fixed_rate(NULL, "v2m:clk_24mhz", NULL,
CLK_IS_ROOT, 24000000);
for (i = 0; i < ARRAY_SIZE(vexpress_clk_24mhz_periphs); i++)
WARN_ON(clk_register_clkdev(clk, NULL,
vexpress_clk_24mhz_periphs[i]));
clk = clk_register_fixed_rate(NULL, "v2m:refclk32khz", NULL,
CLK_IS_ROOT, 32768);
WARN_ON(clk_register_clkdev(clk, NULL, "v2m:wdt"));
clk = clk_register_fixed_rate(NULL, "v2m:refclk1mhz", NULL,
CLK_IS_ROOT, 1000000);
vexpress_sp810_init(sp810_base);
for (i = 0; i < ARRAY_SIZE(vexpress_sp810_timerclken); i++)
WARN_ON(clk_set_parent(vexpress_sp810_timerclken[i], clk));
WARN_ON(clk_register_clkdev(vexpress_sp810_timerclken[0],
"v2m-timer0", "sp804"));
WARN_ON(clk_register_clkdev(vexpress_sp810_timerclken[1],
"v2m-timer1", "sp804"));
}
开发者ID:kjedruczyk,项目名称:parallella-linux-old,代码行数:32,代码来源:clk-vexpress.c
示例2: atlas6_clk_init
static void __init atlas6_clk_init(struct device_node *np)
{
struct device_node *rscnp;
int i;
rscnp = of_find_compatible_node(NULL, NULL, "sirf,prima2-rsc");
sirfsoc_rsc_vbase = of_iomap(rscnp, 0);
if (!sirfsoc_rsc_vbase)
panic("unable to map rsc registers\n");
of_node_put(rscnp);
sirfsoc_clk_vbase = of_iomap(np, 0);
if (!sirfsoc_clk_vbase)
panic("unable to map clkc registers\n");
/* These are always available (RTC and 26MHz OSC)*/
atlas6_clks[rtc] = clk_register_fixed_rate(NULL, "rtc", NULL,
CLK_IS_ROOT, 32768);
atlas6_clks[osc] = clk_register_fixed_rate(NULL, "osc", NULL,
CLK_IS_ROOT, 26000000);
for (i = pll1; i < maxclk; i++) {
atlas6_clks[i] = clk_register(NULL, atlas6_clk_hw_array[i]);
BUG_ON(!atlas6_clks[i]);
}
clk_register_clkdev(atlas6_clks[cpu], NULL, "cpu");
clk_register_clkdev(atlas6_clks[io], NULL, "io");
clk_register_clkdev(atlas6_clks[mem], NULL, "mem");
clk_register_clkdev(atlas6_clks[mem], NULL, "osc");
clk_data.clks = atlas6_clks;
clk_data.clk_num = maxclk;
of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data);
}
开发者ID:0-T-0,项目名称:ps4-linux,代码行数:35,代码来源:clk-atlas6.c
示例3: v2m_clk_init
static void __init v2m_clk_init(void)
{
struct clk *clk;
int i;
clk = clk_register_fixed_rate(NULL, "dummy_apb_pclk", NULL,
CLK_IS_ROOT, 0);
WARN_ON(clk_register_clkdev(clk, "apb_pclk", NULL));
clk = clk_register_fixed_rate(NULL, "mb:ref_clk", NULL,
CLK_IS_ROOT, 32768);
for (i = 0; i < ARRAY_SIZE(v2m_ref_clk_periphs); i++)
WARN_ON(clk_register_clkdev(clk, NULL, v2m_ref_clk_periphs[i]));
clk = clk_register_fixed_rate(NULL, "mb:sp804_clk", NULL,
CLK_IS_ROOT, 1000000);
WARN_ON(clk_register_clkdev(clk, "v2m-timer0", "sp804"));
WARN_ON(clk_register_clkdev(clk, "v2m-timer1", "sp804"));
clk = v2m_osc_register("mb:osc1", &v2m_mb_osc1);
for (i = 0; i < ARRAY_SIZE(v2m_osc1_periphs); i++)
WARN_ON(clk_register_clkdev(clk, NULL, v2m_osc1_periphs[i]));
clk = clk_register_fixed_rate(NULL, "mb:osc2", NULL,
CLK_IS_ROOT, 24000000);
for (i = 0; i < ARRAY_SIZE(v2m_osc2_periphs); i++)
WARN_ON(clk_register_clkdev(clk, NULL, v2m_osc2_periphs[i]));
}
开发者ID:vineetnayak,项目名称:linux,代码行数:28,代码来源:v2m.c
示例4: bcm2835_init_clocks
/*
* These are fixed clocks. They're probably not all root clocks and it may
* be possible to turn them on and off but until this is mapped out better
* it's the only way they can be used.
*/
void __init bcm2835_init_clocks(void)
{
struct clk *clk;
int ret;
clk = clk_register_fixed_rate(NULL, "apb_pclk", NULL, CLK_IS_ROOT,
126000000);
if (IS_ERR(clk))
pr_err("apb_pclk not registered\n");
clk = clk_register_fixed_rate(NULL, "uart0_pclk", NULL, CLK_IS_ROOT,
3000000);
if (IS_ERR(clk))
pr_err("uart0_pclk not registered\n");
ret = clk_register_clkdev(clk, NULL, "20201000.uart");
if (ret)
pr_err("uart0_pclk alias not registered\n");
clk = clk_register_fixed_rate(NULL, "uart1_pclk", NULL, CLK_IS_ROOT,
125000000);
if (IS_ERR(clk))
pr_err("uart1_pclk not registered\n");
ret = clk_register_clkdev(clk, NULL, "20215000.uart");
if (ret)
pr_err("uart1_pclk alias not registered\n");
}
开发者ID:DenisLug,项目名称:mptcp,代码行数:31,代码来源:clk-bcm2835.c
示例5: mvebu_coreclk_setup
void __init mvebu_coreclk_setup(struct device_node *np,
const struct coreclk_soc_desc *desc)
{
const char *tclk_name = "tclk";
const char *cpuclk_name = "cpuclk";
void __iomem *base;
unsigned long rate;
int n;
base = of_iomap(np, 0);
if (WARN_ON(!base))
return;
/* Allocate struct for TCLK, cpu clk, and core ratio clocks */
clk_data.clk_num = 2 + desc->num_ratios;
clk_data.clks = kzalloc(clk_data.clk_num * sizeof(struct clk *),
GFP_KERNEL);
if (WARN_ON(!clk_data.clks)) {
iounmap(base);
return;
}
/* Register TCLK */
of_property_read_string_index(np, "clock-output-names", 0,
&tclk_name);
rate = desc->get_tclk_freq(base);
clk_data.clks[0] = clk_register_fixed_rate(NULL, tclk_name, NULL,
CLK_IS_ROOT, rate);
WARN_ON(IS_ERR(clk_data.clks[0]));
/* Register CPU clock */
of_property_read_string_index(np, "clock-output-names", 1,
&cpuclk_name);
rate = desc->get_cpu_freq(base);
clk_data.clks[1] = clk_register_fixed_rate(NULL, cpuclk_name, NULL,
CLK_IS_ROOT, rate);
WARN_ON(IS_ERR(clk_data.clks[1]));
/* Register fixed-factor clocks derived from CPU clock */
for (n = 0; n < desc->num_ratios; n++) {
const char *rclk_name = desc->ratios[n].name;
int mult, div;
of_property_read_string_index(np, "clock-output-names",
2+n, &rclk_name);
desc->get_clk_ratio(base, desc->ratios[n].id, &mult, &div);
clk_data.clks[2+n] = clk_register_fixed_factor(NULL, rclk_name,
cpuclk_name, 0, mult, div);
WARN_ON(IS_ERR(clk_data.clks[2+n]));
};
/* SAR register isn't needed anymore */
iounmap(base);
of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data);
}
开发者ID:03199618,项目名称:linux,代码行数:56,代码来源:common.c
示例6: realview_clk_init
/*
* realview_clk_init() - set up the RealView clock tree
*/
void __init realview_clk_init(void *sysbase, bool is_pb1176)
{
struct clk *clk;
/* APB clock dummy */
clk = clk_register_fixed_rate(NULL, "apb_pclk", NULL, CLK_IS_ROOT, 0);
clk_register_clkdev(clk, "apb_pclk", NULL);
/* 24 MHz clock */
clk = clk_register_fixed_rate(NULL, "clk24mhz", NULL, CLK_IS_ROOT,
24000000);
clk_register_clkdev(clk, NULL, "dev:uart0");
clk_register_clkdev(clk, NULL, "dev:uart1");
clk_register_clkdev(clk, NULL, "dev:uart2");
clk_register_clkdev(clk, NULL, "fpga:kmi0");
clk_register_clkdev(clk, NULL, "fpga:kmi1");
clk_register_clkdev(clk, NULL, "fpga:mmc0");
clk_register_clkdev(clk, NULL, "dev:ssp0");
if (is_pb1176) {
/*
* UART3 is on the dev chip in PB1176
* UART4 only exists in PB1176
*/
clk_register_clkdev(clk, NULL, "dev:uart3");
clk_register_clkdev(clk, NULL, "dev:uart4");
} else
clk_register_clkdev(clk, NULL, "fpga:uart3");
/* FIXME: Dummy clocks to force match with device tree node names */
clk_register_clkdev(clk, NULL, "kmi0");
clk_register_clkdev(clk, NULL, "kmi1");
/* 1 MHz clock */
clk = clk_register_fixed_rate(NULL, "clk1mhz", NULL, CLK_IS_ROOT,
1000000);
clk_register_clkdev(clk, NULL, "sp804");
/* ICST VCO clock */
if (is_pb1176)
clk = icst_clk_register(NULL, &realview_osc0_desc, sysbase);
else
clk = icst_clk_register(NULL, &realview_osc4_desc, sysbase);
clk_register_clkdev(clk, NULL, "dev:clcd");
clk_register_clkdev(clk, NULL, "issp:clcd");
/* FIXME: Dummy clocks to force match with device tree node names */
clk_register_clkdev(clk, NULL, "clcd");
}
开发者ID:HeidCloud,项目名称:xvisor,代码行数:52,代码来源:clk-realview.c
示例7: hisi_clk_register_fixed_rate
int hisi_clk_register_fixed_rate(const struct hisi_fixed_rate_clock *clks,
int nums, struct hisi_clock_data *data)
{
struct clk *clk;
int i;
for (i = 0; i < nums; i++) {
clk = clk_register_fixed_rate(NULL, clks[i].name,
clks[i].parent_name,
clks[i].flags,
clks[i].fixed_rate);
if (IS_ERR(clk)) {
pr_err("%s: failed to register clock %s\n",
__func__, clks[i].name);
goto err;
}
data->clk_data.clks[clks[i].id] = clk;
}
return 0;
err:
while (i--)
clk_unregister_fixed_rate(data->clk_data.clks[clks[i].id]);
return PTR_ERR(clk);
}
开发者ID:AlexShiLucky,项目名称:linux,代码行数:27,代码来源:clk.c
示例8: of_fixed_clk_setup
/**
* of_fixed_clk_setup() - Setup function for simple fixed rate clock
*/
void of_fixed_clk_setup(struct device_node *node)
{
struct clk *clk;
const char *clk_name = node->name;
u32 rate = 0;
if (of_property_read_u32(node, "clock-frequency", &rate)) {
pr_err("%s Fixed rate clock <%s> must have a clock rate property\n",
__func__, node->name);
return;
}
if (of_property_read_string(node, "clock-output-names", &clk_name)) {
pr_err("%s Fixed rate clock <%s> must have a clock name property\n",
__func__, node->name);
return;
}
clk = clk_register_fixed_rate(NULL, clk_name, NULL, CLK_IS_ROOT, rate);
if (!IS_ERR(clk))
of_clk_add_provider(node, of_clk_src_simple_get, clk);
#ifdef CONFIG_HI3630_CLK
clk_register_clkdev(clk, clk_name, NULL);
#endif
}
开发者ID:XMelancholy,项目名称:android_kernel_huawei_h60,代码行数:28,代码来源:clk-fixed-rate.c
示例9: ccu_osc_clk_init
/*
* ccu_osc_clk_init
* ccu is in same PCI device with PMU. CCU address is at offset 0x800.
* ccu's inialization is called from PMU init.
*/
int ccu_osc_clk_init(void __iomem *ccubase)
{
struct clk *clk;
int i, ret;
char name[12];
pr_debug("%s entry\n", __func__);
clk = clk_register_fixed_rate(NULL, "clk-osc", NULL,
CLK_IS_ROOT, OSC_CLOCK_RATE);
if (IS_ERR(clk)) {
pr_err("%s:clk register fail.\n", __func__);
return -1;
}
clk_register_clkdev(clk, "clk-osc", NULL);
for (i = 0; i < OSC_CLOCK_COUNT; i++) {
memset(name, 0, sizeof(name));
sprintf(name, "osc.%d", i);
clk = ccu_osc_clk_register(name, "clk-osc", ccubase
+ CCU_OSC_CTL_OFF + i * 4, i);
if (!IS_ERR(clk))
ret = clk_register_clkdev(clk, name, NULL);
}
return 0;
}
开发者ID:AOSP-Zenfone2,项目名称:kernel_asus_moorefield_stock,代码行数:32,代码来源:clk-osc.c
示例10: clk_init
void __init clk_init(void)
{
tclk = clk_register_fixed_rate(NULL, "tclk", NULL, CLK_IS_ROOT,
orion5x_tclk);
orion_clkdev_init(tclk);
}
开发者ID:020gzh,项目名称:linux,代码行数:7,代码来源:common.c
示例11: meson_clk_register_fixed_rate
static struct clk * __init
meson_clk_register_fixed_rate(const struct clk_conf *clk_conf,
void __iomem *clk_base)
{
struct clk *clk;
const struct fixed_rate_conf *fixed_rate_conf;
const struct parm *r;
unsigned long rate;
u32 reg;
fixed_rate_conf = &clk_conf->conf.fixed_rate;
rate = fixed_rate_conf->rate;
if (!rate) {
r = &fixed_rate_conf->rate_parm;
reg = readl(clk_base + clk_conf->reg_off + r->reg_off);
rate = PARM_GET(r->width, r->shift, reg);
}
rate *= 1000000;
clk = clk_register_fixed_rate(NULL,
clk_conf->clk_name,
clk_conf->num_parents
? clk_conf->clks_parent[0] : NULL,
clk_conf->flags, rate);
return clk;
}
开发者ID:0-T-0,项目名称:ps4-linux,代码行数:29,代码来源:clkc.c
示例12: amlogic_clk_register_fixed_rate
/* register a list of fixed clocks */
void __init amlogic_clk_register_fixed_rate(
struct amlogic_fixed_rate_clock *list, unsigned int nr_clk)
{
struct clk *clk;
unsigned int idx, ret;
for (idx = 0; idx < nr_clk; idx++, list++) {
clk = clk_register_fixed_rate(NULL, list->name,
list->parent_name, list->flags, list->fixed_rate);
if (IS_ERR(clk)) {
pr_err("%s: failed to register clock %s\n", __func__,
list->name);
continue;
}
amlogic_clk_add_lookup(clk, list->id);
/*
* Unconditionally add a clock lookup for the fixed rate clocks.
* There are not many of these on any of Amlogic platforms.
*/
ret = clk_register_clkdev(clk, list->name, NULL);
if (ret)
pr_err("%s: failed to register clock lookup for %s",
__func__, list->name);
}
}
开发者ID:gcsuri,项目名称:linux-wetek-3.14.y,代码行数:28,代码来源:clk.c
示例13: dw_i2c_acpi_configure
static int dw_i2c_acpi_configure(struct platform_device *pdev)
{
struct dw_i2c_dev *dev = platform_get_drvdata(pdev);
const struct acpi_device_id *id;
dev->adapter.nr = -1;
dev->tx_fifo_depth = 32;
dev->rx_fifo_depth = 32;
/*
* Try to get SDA hold time and *CNT values from an ACPI method if
* it exists for both supported speed modes.
*/
dw_i2c_acpi_params(pdev, "SSCN", &dev->ss_hcnt, &dev->ss_lcnt, NULL);
dw_i2c_acpi_params(pdev, "FMCN", &dev->fs_hcnt, &dev->fs_lcnt,
&dev->sda_hold_time);
/*
* Provide a way for Designware I2C host controllers that are not
* based on Intel LPSS to specify their input clock frequency via
* id->driver_data.
*/
id = acpi_match_device(pdev->dev.driver->acpi_match_table, &pdev->dev);
if (id && id->driver_data)
clk_register_fixed_rate(&pdev->dev, dev_name(&pdev->dev), NULL,
CLK_IS_ROOT, id->driver_data);
return 0;
}
开发者ID:DenisLug,项目名称:mptcp,代码行数:29,代码来源:i2c-designware-platdrv.c
示例14: socfpga_init_clocks
void __init socfpga_init_clocks(void)
{
struct clk *clk;
clk = clk_register_fixed_rate(NULL, "osc1_clk", NULL, CLK_IS_ROOT, SOCFPGA_OSC1_CLK);
clk_register_clkdev(clk, "osc1_clk", NULL);
clk = clk_register_fixed_rate(NULL, "mpu_clk", NULL, CLK_IS_ROOT, SOCFPGA_MPU_CLK);
clk_register_clkdev(clk, "mpu_clk", NULL);
clk = clk_register_fixed_rate(NULL, "main_clk", NULL, CLK_IS_ROOT, SOCFPGA_MPU_CLK/2);
clk_register_clkdev(clk, "main_clk", NULL);
clk = clk_register_fixed_rate(NULL, "dbg_base_clk", NULL, CLK_IS_ROOT, SOCFPGA_MPU_CLK/2);
clk_register_clkdev(clk, "dbg_base_clk", NULL);
clk = clk_register_fixed_rate(NULL, "main_qspi_clk", NULL, CLK_IS_ROOT, SOCFPGA_MAIN_QSPI_CLK);
clk_register_clkdev(clk, "main_qspi_clk", NULL);
clk = clk_register_fixed_rate(NULL, "main_nand_sdmmc_clk", NULL, CLK_IS_ROOT, SOCFPGA_MAIN_NAND_SDMMC_CLK);
clk_register_clkdev(clk, "main_nand_sdmmc_clk", NULL);
clk = clk_register_fixed_rate(NULL, "s2f_usr_clk", NULL, CLK_IS_ROOT, SOCFPGA_S2F_USR_CLK);
clk_register_clkdev(clk, "s2f_usr_clk", NULL);
}
开发者ID:ARMWorks,项目名称:FA_2451_Linux_Kernel,代码行数:25,代码来源:clk.c
示例15: ERR_PTR
static struct clk *sysclk_from_fixed(struct device_node *node, const char *name)
{
u32 rate;
if (of_property_read_u32(node, "clock-frequency", &rate))
return ERR_PTR(-ENODEV);
return clk_register_fixed_rate(NULL, name, NULL, CLK_IS_ROOT, rate);
}
开发者ID:0-T-0,项目名称:ps4-linux,代码行数:9,代码来源:clk-qoriq.c
示例16: clk_register_fixed_rate
struct clk __init *bcm2708_clk_register(const char *name, unsigned long fixed_rate)
{
struct clk *clk;
clk = clk_register_fixed_rate(NULL, name, NULL, CLK_IS_ROOT,
fixed_rate);
if (IS_ERR(clk))
pr_err("%s not registered\n", name);
return clk;
}
开发者ID:valorekhov,项目名称:rpi-bluetooth-next,代码行数:11,代码来源:bcm2708.c
示例17: dove_clk_init
static void __init dove_clk_init(void)
{
struct clk *usb0, *usb1, *sata, *pex0, *pex1, *sdio0, *sdio1;
struct clk *nand, *camera, *i2s0, *i2s1, *crypto, *ac97, *pdma;
struct clk *xor0, *xor1, *ge, *gephy;
tclk = clk_register_fixed_rate(NULL, "tclk", NULL, CLK_IS_ROOT,
dove_tclk);
usb0 = dove_register_gate("usb0", "tclk", CLOCK_GATING_BIT_USB0);
usb1 = dove_register_gate("usb1", "tclk", CLOCK_GATING_BIT_USB1);
sata = dove_register_gate("sata", "tclk", CLOCK_GATING_BIT_SATA);
pex0 = dove_register_gate("pex0", "tclk", CLOCK_GATING_BIT_PCIE0);
pex1 = dove_register_gate("pex1", "tclk", CLOCK_GATING_BIT_PCIE1);
sdio0 = dove_register_gate("sdio0", "tclk", CLOCK_GATING_BIT_SDIO0);
sdio1 = dove_register_gate("sdio1", "tclk", CLOCK_GATING_BIT_SDIO1);
nand = dove_register_gate("nand", "tclk", CLOCK_GATING_BIT_NAND);
camera = dove_register_gate("camera", "tclk", CLOCK_GATING_BIT_CAMERA);
i2s0 = dove_register_gate("i2s0", "tclk", CLOCK_GATING_BIT_I2S0);
i2s1 = dove_register_gate("i2s1", "tclk", CLOCK_GATING_BIT_I2S1);
crypto = dove_register_gate("crypto", "tclk", CLOCK_GATING_BIT_CRYPTO);
ac97 = dove_register_gate("ac97", "tclk", CLOCK_GATING_BIT_AC97);
pdma = dove_register_gate("pdma", "tclk", CLOCK_GATING_BIT_PDMA);
xor0 = dove_register_gate("xor0", "tclk", CLOCK_GATING_BIT_XOR0);
xor1 = dove_register_gate("xor1", "tclk", CLOCK_GATING_BIT_XOR1);
gephy = dove_register_gate("gephy", "tclk", CLOCK_GATING_BIT_GIGA_PHY);
ge = dove_register_gate("ge", "gephy", CLOCK_GATING_BIT_GBE);
orion_clkdev_add(NULL, "orion_spi.0", tclk);
orion_clkdev_add(NULL, "orion_spi.1", tclk);
orion_clkdev_add(NULL, "orion_wdt", tclk);
orion_clkdev_add(NULL, "mv64xxx_i2c.0", tclk);
orion_clkdev_add(NULL, "orion-ehci.0", usb0);
orion_clkdev_add(NULL, "orion-ehci.1", usb1);
orion_clkdev_add(NULL, "mv643xx_eth_port.0", ge);
orion_clkdev_add(NULL, "sata_mv.0", sata);
orion_clkdev_add("0", "pcie", pex0);
orion_clkdev_add("1", "pcie", pex1);
orion_clkdev_add(NULL, "sdhci-dove.0", sdio0);
orion_clkdev_add(NULL, "sdhci-dove.1", sdio1);
orion_clkdev_add(NULL, "orion_nand", nand);
orion_clkdev_add(NULL, "cafe1000-ccic.0", camera);
orion_clkdev_add(NULL, "mvebu-audio.0", i2s0);
orion_clkdev_add(NULL, "mvebu-audio.1", i2s1);
orion_clkdev_add(NULL, "mv_crypto", crypto);
orion_clkdev_add(NULL, "dove-ac97", ac97);
orion_clkdev_add(NULL, "dove-pdma", pdma);
orion_clkdev_add(NULL, MV_XOR_NAME ".0", xor0);
orion_clkdev_add(NULL, MV_XOR_NAME ".1", xor1);
}
开发者ID:0-T-0,项目名称:ps4-linux,代码行数:51,代码来源:common.c
示例18: integrator_clk_init
/*
* integrator_clk_init() - set up the integrator clock tree
* @is_cp: pass true if it's the Integrator/CP else AP is assumed
*/
void __init integrator_clk_init(bool is_cp)
{
struct clk *clk;
/* APB clock dummy */
clk = clk_register_fixed_rate(NULL, "apb_pclk", NULL, CLK_IS_ROOT, 0);
clk_register_clkdev(clk, "apb_pclk", NULL);
/* UART reference clock */
clk = clk_register_fixed_rate(NULL, "uartclk", NULL, CLK_IS_ROOT,
14745600);
clk_register_clkdev(clk, NULL, "uart0");
clk_register_clkdev(clk, NULL, "uart1");
if (is_cp)
clk_register_clkdev(clk, NULL, "mmci");
/* 24 MHz clock */
clk = clk_register_fixed_rate(NULL, "clk24mhz", NULL, CLK_IS_ROOT,
24000000);
clk_register_clkdev(clk, NULL, "kmi0");
clk_register_clkdev(clk, NULL, "kmi1");
if (!is_cp)
clk_register_clkdev(clk, NULL, "ap_timer");
if (!is_cp)
return;
/* 1 MHz clock */
clk = clk_register_fixed_rate(NULL, "clk1mhz", NULL, CLK_IS_ROOT,
1000000);
clk_register_clkdev(clk, NULL, "sp804");
/* ICST VCO clock used on the Integrator/CP CLCD */
clk = icst_clk_register(NULL, &cp_icst_desc, "icst",
__io_address(INTEGRATOR_HDR_BASE));
clk_register_clkdev(clk, NULL, "clcd");
}
开发者ID:AdaLovelance,项目名称:lxcGrsecKernels,代码行数:41,代码来源:clk-integrator.c
示例19: of_fixed_clk_setup
/**
* of_fixed_clk_setup() - Setup function for simple fixed rate clock
*/
void of_fixed_clk_setup(struct device_node *node)
{
struct clk *clk;
const char *clk_name = node->name;
u32 rate;
if (of_property_read_u32(node, "clock-frequency", &rate))
return;
of_property_read_string(node, "clock-output-names", &clk_name);
clk = clk_register_fixed_rate(NULL, clk_name, NULL, CLK_IS_ROOT, rate);
if (!IS_ERR(clk))
of_clk_add_provider(node, of_clk_src_simple_get, clk);
}
开发者ID:03199618,项目名称:linux,代码行数:18,代码来源:clk-fixed-rate.c
示例20: acpi_apd_setup
static int acpi_apd_setup(struct apd_private_data *pdata)
{
const struct apd_device_desc *dev_desc = pdata->dev_desc;
struct clk *clk = ERR_PTR(-ENODEV);
if (dev_desc->fixed_clk_rate) {
clk = clk_register_fixed_rate(&pdata->adev->dev,
dev_name(&pdata->adev->dev),
NULL, 0, dev_desc->fixed_clk_rate);
clk_register_clkdev(clk, NULL, dev_name(&pdata->adev->dev));
pdata->clk = clk;
}
return 0;
}
开发者ID:linux-next,项目名称:linux-next,代码行数:15,代码来源:acpi_apd.c
注:本文中的clk_register_fixed_rate函数示例由纯净天空整理自Github/MSDocs等源码及文档管理平台,相关代码片段筛选自各路编程大神贡献的开源项目,源码版权归原作者所有,传播和使用请参考对应项目的License;未经允许,请勿转载。 |
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