本文整理汇总了C++中clk_round_rate函数的典型用法代码示例。如果您正苦于以下问题:C++ clk_round_rate函数的具体用法?C++ clk_round_rate怎么用?C++ clk_round_rate使用的例子?那么恭喜您, 这里精选的函数代码示例或许可以为您提供帮助。
在下文中一共展示了clk_round_rate函数的20个代码示例,这些例子默认根据受欢迎程度排序。您可以为喜欢或者感觉有用的代码点赞,您的评价将有助于我们的系统推荐出更棒的C++代码示例。
示例1: msm_iommu_probe
static int msm_iommu_probe(struct platform_device *pdev)
{
struct resource *r, *r2;
struct clk *iommu_clk = NULL;
struct clk *iommu_pclk = NULL;
struct msm_iommu_drvdata *drvdata;
struct msm_iommu_dev *iommu_dev = pdev->dev.platform_data;
void __iomem *regs_base;
resource_size_t len;
int ret, irq, par;
if (pdev->id == -1) {
msm_iommu_root_dev = pdev;
return 0;
}
drvdata = kzalloc(sizeof(*drvdata), GFP_KERNEL);
if (!drvdata) {
ret = -ENOMEM;
goto fail;
}
if (!iommu_dev) {
ret = -ENODEV;
goto fail;
}
iommu_pclk = clk_get_sys("msm_iommu", "iface_clk");
if (IS_ERR(iommu_pclk)) {
ret = -ENODEV;
goto fail;
}
ret = clk_enable(iommu_pclk);
if (ret)
goto fail_enable;
iommu_clk = clk_get(&pdev->dev, "core_clk");
if (!IS_ERR(iommu_clk)) {
if (clk_get_rate(iommu_clk) == 0) {
ret = clk_round_rate(iommu_clk, 1);
clk_set_rate(iommu_clk, ret);
}
ret = clk_enable(iommu_clk);
if (ret) {
clk_put(iommu_clk);
goto fail_pclk;
}
} else
iommu_clk = NULL;
r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "physbase");
if (!r) {
ret = -ENODEV;
goto fail_clk;
}
len = resource_size(r);
r2 = request_mem_region(r->start, len, r->name);
if (!r2) {
pr_err("Could not request memory region: start=%p, len=%d\n",
(void *) r->start, len);
ret = -EBUSY;
goto fail_clk;
}
regs_base = ioremap(r2->start, len);
if (!regs_base) {
pr_err("Could not ioremap: start=%p, len=%d\n",
(void *) r2->start, len);
ret = -EBUSY;
goto fail_mem;
}
irq = platform_get_irq_byname(pdev, "nonsecure_irq");
if (irq < 0) {
ret = -ENODEV;
goto fail_io;
}
msm_iommu_reset(regs_base, iommu_dev->ncb);
SET_M(regs_base, 0, 1);
SET_PAR(regs_base, 0, 0);
SET_V2PCFG(regs_base, 0, 1);
SET_V2PPR(regs_base, 0, 0);
mb();
par = GET_PAR(regs_base, 0);
SET_V2PCFG(regs_base, 0, 0);
SET_M(regs_base, 0, 0);
mb();
if (!par) {
pr_err("%s: Invalid PAR value detected\n", iommu_dev->name);
//.........这里部分代码省略.........
开发者ID:AndyOpie,项目名称:android_kernel_lge_msm7x27-3.0.x,代码行数:101,代码来源:iommu_dev.c
示例2: parent_round_rate
long parent_round_rate(struct clk *c, unsigned long rate)
{
return clk_round_rate(c->parent, rate);
}
开发者ID:boa19861105,项目名称:LeeDrOiD-Hima-M9,代码行数:4,代码来源:clock-generic.c
示例3: msm_cam_clk_enable
int msm_cam_clk_enable(struct device *dev, struct msm_cam_clk_info *clk_info,
struct clk **clk_ptr, int num_clk, int enable)
{
int i;
int rc = 0;
long clk_rate;
if (enable) {
for (i = 0; i < num_clk; i++) {
CDBG("%s enable %s\n", __func__, clk_info[i].clk_name);
clk_ptr[i] = clk_get(dev, clk_info[i].clk_name);
if (IS_ERR(clk_ptr[i])) {
pr_err("%s get failed\n", clk_info[i].clk_name);
rc = PTR_ERR(clk_ptr[i]);
goto cam_clk_get_err;
}
if (clk_info[i].clk_rate > 0) {
clk_rate = clk_round_rate(clk_ptr[i],
clk_info[i].clk_rate);
if (clk_rate < 0) {
pr_err("%s round failed\n",
clk_info[i].clk_name);
goto cam_clk_set_err;
}
rc = clk_set_rate(clk_ptr[i],
clk_rate);
if (rc < 0) {
pr_err("%s set failed\n",
clk_info[i].clk_name);
goto cam_clk_set_err;
}
} else if (clk_info[i].clk_rate == INIT_RATE) {
clk_rate = clk_get_rate(clk_ptr[i]);
if (clk_rate == 0) {
clk_rate =
clk_round_rate(clk_ptr[i], 0);
if (clk_rate < 0) {
pr_err("%s round rate failed\n",
clk_info[i].clk_name);
goto cam_clk_set_err;
}
rc = clk_set_rate(clk_ptr[i],
clk_rate);
if (rc < 0) {
pr_err("%s set rate failed\n",
clk_info[i].clk_name);
goto cam_clk_set_err;
}
}
}
rc = clk_prepare(clk_ptr[i]);
if (rc < 0) {
pr_err("%s prepare failed\n",
clk_info[i].clk_name);
goto cam_clk_prepare_err;
}
rc = clk_enable(clk_ptr[i]);
if (rc < 0) {
pr_err("%s enable failed\n",
clk_info[i].clk_name);
goto cam_clk_enable_err;
}
if (clk_info[i].delay > 20) {
msleep(clk_info[i].delay);
} else if (clk_info[i].delay) {
usleep_range(clk_info[i].delay * 1000,
(clk_info[i].delay * 1000) + 1000);
}
}
} else {
for (i = num_clk - 1; i >= 0; i--) {
if (clk_ptr[i] != NULL) {
CDBG("%s disable %s\n", __func__,
clk_info[i].clk_name);
clk_disable(clk_ptr[i]);
clk_unprepare(clk_ptr[i]);
clk_put(clk_ptr[i]);
}
}
}
return rc;
cam_clk_enable_err:
clk_unprepare(clk_ptr[i]);
cam_clk_prepare_err:
cam_clk_set_err:
clk_put(clk_ptr[i]);
cam_clk_get_err:
for (i--; i >= 0; i--) {
if (clk_ptr[i] != NULL) {
clk_disable(clk_ptr[i]);
clk_unprepare(clk_ptr[i]);
clk_put(clk_ptr[i]);
}
}
return rc;
}
开发者ID:garwedgess,项目名称:android_kernel_lge_g4,代码行数:99,代码来源:msm_camera_io_util.c
示例4: db1200_dev_setup
int __init db1200_dev_setup(void)
{
unsigned long pfc;
unsigned short sw;
int swapped, bid;
struct clk *c;
bid = BCSR_WHOAMI_BOARD(bcsr_read(BCSR_WHOAMI));
if ((bid == BCSR_WHOAMI_PB1200_DDR1) ||
(bid == BCSR_WHOAMI_PB1200_DDR2)) {
if (pb1200_res_fixup())
return -ENODEV;
}
/* GPIO7 is low-level triggered CPLD cascade */
irq_set_irq_type(AU1200_GPIO7_INT, IRQ_TYPE_LEVEL_LOW);
bcsr_init_irq(DB1200_INT_BEGIN, DB1200_INT_END, AU1200_GPIO7_INT);
/* SMBus/SPI on PSC0, Audio on PSC1 */
pfc = alchemy_rdsys(AU1000_SYS_PINFUNC);
pfc &= ~(SYS_PINFUNC_P0A | SYS_PINFUNC_P0B);
pfc &= ~(SYS_PINFUNC_P1A | SYS_PINFUNC_P1B | SYS_PINFUNC_FS3);
pfc |= SYS_PINFUNC_P1C; /* SPI is configured later */
alchemy_wrsys(pfc, AU1000_SYS_PINFUNC);
/* get 50MHz for I2C driver on PSC0 */
c = clk_get(NULL, "psc0_intclk");
if (!IS_ERR(c)) {
pfc = clk_round_rate(c, 50000000);
if ((pfc < 1) || (abs(50000000 - pfc) > 2500000))
pr_warn("DB1200: cant get I2C close to 50MHz\n");
else
clk_set_rate(c, pfc);
clk_put(c);
}
/* insert/eject pairs: one of both is always screaming. To avoid
* issues they must not be automatically enabled when initially
* requested.
*/
irq_set_status_flags(DB1200_SD0_INSERT_INT, IRQ_NOAUTOEN);
irq_set_status_flags(DB1200_SD0_EJECT_INT, IRQ_NOAUTOEN);
irq_set_status_flags(DB1200_PC0_INSERT_INT, IRQ_NOAUTOEN);
irq_set_status_flags(DB1200_PC0_EJECT_INT, IRQ_NOAUTOEN);
irq_set_status_flags(DB1200_PC1_INSERT_INT, IRQ_NOAUTOEN);
irq_set_status_flags(DB1200_PC1_EJECT_INT, IRQ_NOAUTOEN);
i2c_register_board_info(0, db1200_i2c_devs,
ARRAY_SIZE(db1200_i2c_devs));
spi_register_board_info(db1200_spi_devs,
ARRAY_SIZE(db1200_i2c_devs));
/* SWITCHES: S6.8 I2C/SPI selector (OFF=I2C ON=SPI)
* S6.7 AC97/I2S selector (OFF=AC97 ON=I2S)
* or S12 on the PB1200.
*/
/* NOTE: GPIO215 controls OTG VBUS supply. In SPI mode however
* this pin is claimed by PSC0 (unused though, but pinmux doesn't
* allow to free it without crippling the SPI interface).
* As a result, in SPI mode, OTG simply won't work (PSC0 uses
* it as an input pin which is pulled high on the boards).
*/
pfc = alchemy_rdsys(AU1000_SYS_PINFUNC) & ~SYS_PINFUNC_P0A;
/* switch off OTG VBUS supply */
gpio_request(215, "otg-vbus");
gpio_direction_output(215, 1);
printk(KERN_INFO "%s device configuration:\n", get_system_type());
sw = bcsr_read(BCSR_SWITCHES);
if (sw & BCSR_SWITCHES_DIP_8) {
db1200_devs[0] = &db1200_i2c_dev;
bcsr_mod(BCSR_RESETS, BCSR_RESETS_PSC0MUX, 0);
pfc |= (2 << 17); /* GPIO2 block owns GPIO215 */
printk(KERN_INFO " S6.8 OFF: PSC0 mode I2C\n");
printk(KERN_INFO " OTG port VBUS supply available!\n");
} else {
db1200_devs[0] = &db1200_spi_dev;
bcsr_mod(BCSR_RESETS, 0, BCSR_RESETS_PSC0MUX);
pfc |= (1 << 17); /* PSC0 owns GPIO215 */
printk(KERN_INFO " S6.8 ON : PSC0 mode SPI\n");
printk(KERN_INFO " OTG port VBUS supply disabled\n");
}
alchemy_wrsys(pfc, AU1000_SYS_PINFUNC);
/* Audio: DIP7 selects I2S(0)/AC97(1), but need I2C for I2S!
* so: DIP7=1 || DIP8=0 => AC97, DIP7=0 && DIP8=1 => I2S
*/
sw &= BCSR_SWITCHES_DIP_8 | BCSR_SWITCHES_DIP_7;
if (sw == BCSR_SWITCHES_DIP_8) {
bcsr_mod(BCSR_RESETS, 0, BCSR_RESETS_PSC1MUX);
db1200_audio_dev.name = "au1xpsc_i2s";
db1200_sound_dev.name = "db1200-i2s";
printk(KERN_INFO " S6.7 ON : PSC1 mode I2S\n");
//.........这里部分代码省略.........
开发者ID:arhaa,项目名称:Ubuntu-kernel,代码行数:101,代码来源:db1200.c
示例5: msm_ehci_init_clocks
static int msm_ehci_init_clocks(struct msm_hcd *mhcd, u32 init)
{
int ret = 0;
if (!init)
goto put_clocks;
/* iface_clk is required for data transfers */
mhcd->iface_clk = devm_clk_get(mhcd->dev, "iface_clk");
if (IS_ERR(mhcd->iface_clk)) {
ret = PTR_ERR(mhcd->iface_clk);
mhcd->iface_clk = NULL;
if (ret != -EPROBE_DEFER)
dev_err(mhcd->dev, "failed to get iface_clk\n");
return ret;
}
/* Link's protocol engine is based on pclk which must
* be running >55Mhz and frequency should also not change.
* Hence, vote for maximum clk frequency on its source
*/
mhcd->core_clk = devm_clk_get(mhcd->dev, "core_clk");
if (IS_ERR(mhcd->core_clk)) {
ret = PTR_ERR(mhcd->core_clk);
mhcd->core_clk = NULL;
if (ret != -EPROBE_DEFER)
dev_err(mhcd->dev, "failed to get core_clk\n");
return ret;
}
/*
* Get Max supported clk frequency for USB Core CLK and request
* to set the same.
*/
mhcd->core_clk_rate = clk_round_rate(mhcd->core_clk, LONG_MAX);
if (IS_ERR_VALUE(mhcd->core_clk_rate)) {
ret = mhcd->core_clk_rate;
dev_err(mhcd->dev, "fail to get core clk max freq\n");
return ret;
}
ret = clk_set_rate(mhcd->core_clk, mhcd->core_clk_rate);
if (ret) {
dev_err(mhcd->dev, "fail to set core_clk: %d\n", ret);
return ret;
}
clk_prepare_enable(mhcd->core_clk);
clk_prepare_enable(mhcd->iface_clk);
mhcd->phy_sleep_clk = devm_clk_get(mhcd->dev, "sleep_clk");
if (IS_ERR(mhcd->phy_sleep_clk)) {
mhcd->phy_sleep_clk = NULL;
dev_dbg(mhcd->dev, "failed to get sleep_clk\n");
} else {
clk_prepare_enable(mhcd->phy_sleep_clk);
}
/* 60MHz alt_core_clk is for LINK to be used during PHY RESET */
mhcd->alt_core_clk = devm_clk_get(mhcd->dev, "alt_core_clk");
if (IS_ERR(mhcd->alt_core_clk)) {
mhcd->alt_core_clk = NULL;
dev_dbg(mhcd->dev, "failed to get alt_core_clk\n");
} else {
clk_set_rate(mhcd->alt_core_clk, 60000000);
}
return 0;
put_clocks:
if (!atomic_read(&mhcd->in_lpm)) {
clk_disable_unprepare(mhcd->iface_clk);
clk_disable_unprepare(mhcd->core_clk);
}
if (mhcd->phy_sleep_clk)
clk_disable_unprepare(mhcd->phy_sleep_clk);
return 0;
}
开发者ID:Menpiko,项目名称:SnaPKernel-N6P,代码行数:79,代码来源:ehci-msm2.c
示例6: enter_lpm_imx6sl
static void enter_lpm_imx6sl(void)
{
if (high_bus_freq_mode) {
pll2_org_rate = clk_get_rate(pll2_bus);
/* Set periph_clk to be sourced from OSC_CLK */
imx_clk_set_parent(periph_clk2_sel, osc_clk);
imx_clk_set_parent(periph_clk, periph_clk2);
/* Ensure AHB/AXI clks are at 24MHz. */
imx_clk_set_rate(ahb_clk, LPAPM_CLK);
imx_clk_set_rate(ocram_clk, LPAPM_CLK);
}
if (audio_bus_count) {
/* Set AHB to 8MHz to lower pwer.*/
imx_clk_set_rate(ahb_clk, LPAPM_CLK / 3);
/* Set up DDR to 100MHz. */
update_lpddr2_freq(HIGH_AUDIO_CLK);
/* Fix the clock tree in kernel */
imx_clk_set_parent(periph2_pre_clk, pll2_200);
imx_clk_set_parent(periph2_clk, periph2_pre_clk);
if (low_bus_freq_mode || ultra_low_bus_freq_mode) {
/*
* Fix the clock tree in kernel, make sure
* pll2_bypass is updated as it is
* sourced from PLL2.
*/
imx_clk_set_parent(pll2_bypass, pll2);
/*
* Swtich ARM to run off PLL2_PFD2_400MHz
* since DDR is anyway at 100MHz.
*/
imx_clk_set_parent(step_clk, pll2_400);
imx_clk_set_parent(pll1_sw_clk, step_clk);
/*
* Need to ensure that PLL1 is bypassed and enabled
* before ARM-PODF is set.
*/
clk_set_parent(pll1_bypass, pll1_bypass_src);
/*
* Ensure that the clock will be
* at original speed.
*/
imx_clk_set_rate(cpu_clk, org_arm_rate);
}
low_bus_freq_mode = 0;
ultra_low_bus_freq_mode = 0;
audio_bus_freq_mode = 1;
cur_bus_freq_mode = BUS_FREQ_AUDIO;
} else {
u32 arm_div, pll1_rate;
org_arm_rate = clk_get_rate(cpu_clk);
if (low_bus_freq_mode && low_bus_count == 0) {
/*
* We are already in DDR @ 24MHz state, but
* no one but ARM needs the DDR. In this case,
* we can lower the DDR freq to 1MHz when ARM
* enters WFI in this state. Keep track of this state.
*/
ultra_low_bus_freq_mode = 1;
low_bus_freq_mode = 0;
audio_bus_freq_mode = 0;
cur_bus_freq_mode = BUS_FREQ_ULTRA_LOW;
} else {
if (!ultra_low_bus_freq_mode && !low_bus_freq_mode) {
/*
* Anyway, make sure the AHB is running at 24MHz
* in low_bus_freq_mode.
*/
if (audio_bus_freq_mode)
imx_clk_set_rate(ahb_clk, LPAPM_CLK);
/*
* Set DDR to 24MHz.
* Since we are going to bypass PLL2,
* we need to move ARM clk off PLL2_PFD2
* to PLL1. Make sure the PLL1 is running
* at the lowest possible freq.
* To work well with CPUFREQ we want to ensure that
* the CPU freq does not change, so attempt to
* get a freq as close to 396MHz as possible.
*/
imx_clk_set_rate(pll1,
clk_round_rate(pll1, (org_arm_rate * 2)));
pll1_rate = clk_get_rate(pll1);
arm_div = pll1_rate / org_arm_rate;
if (pll1_rate / arm_div > org_arm_rate)
arm_div++;
/*
* Need to ensure that PLL1 is bypassed and enabled
* before ARM-PODF is set.
*/
clk_set_parent(pll1_bypass, pll1);
/*
* Ensure ARM CLK is lower before
* changing the parent.
*/
imx_clk_set_rate(cpu_clk, org_arm_rate / arm_div);
/* Now set the ARM clk parent to PLL1_SYS. */
//.........这里部分代码省略.........
开发者ID:FEDEVEL,项目名称:openrex-linux-3.14,代码行数:101,代码来源:busfreq-imx.c
示例7: omap_bandgap_probe
static
int omap_bandgap_probe(struct platform_device *pdev)
{
struct omap_bandgap *bg_ptr;
int clk_rate, ret = 0, i;
bg_ptr = omap_bandgap_build(pdev);
if (IS_ERR_OR_NULL(bg_ptr)) {
dev_err(&pdev->dev, "failed to fetch platform data\n");
return PTR_ERR(bg_ptr);
}
bg_ptr->dev = &pdev->dev;
if (OMAP_BANDGAP_HAS(bg_ptr, TSHUT)) {
ret = omap_bandgap_tshut_init(bg_ptr, pdev);
if (ret) {
dev_err(&pdev->dev,
"failed to initialize system tshut IRQ\n");
return ret;
}
}
bg_ptr->fclock = clk_get(NULL, bg_ptr->conf->fclock_name);
ret = IS_ERR_OR_NULL(bg_ptr->fclock);
if (ret) {
dev_err(&pdev->dev, "failed to request fclock reference\n");
goto free_irqs;
}
bg_ptr->div_clk = clk_get(NULL, bg_ptr->conf->div_ck_name);
ret = IS_ERR_OR_NULL(bg_ptr->div_clk);
if (ret) {
dev_err(&pdev->dev,
"failed to request div_ts_ck clock ref\n");
goto free_irqs;
}
bg_ptr->conv_table = bg_ptr->conf->conv_table;
for (i = 0; i < bg_ptr->conf->sensor_count; i++) {
struct temp_sensor_registers *tsr;
u32 val;
tsr = bg_ptr->conf->sensors[i].registers;
/*
* check if the efuse has a non-zero value if not
* it is an untrimmed sample and the temperatures
* may not be accurate
*/
val = omap_bandgap_readl(bg_ptr, tsr->bgap_efuse);
if (ret || !val)
dev_info(&pdev->dev,
"Non-trimmed BGAP, Temp not accurate\n");
}
clk_rate = clk_round_rate(bg_ptr->div_clk,
bg_ptr->conf->sensors[0].ts_data->max_freq);
if (clk_rate < bg_ptr->conf->sensors[0].ts_data->min_freq ||
clk_rate == 0xffffffff) {
ret = -ENODEV;
dev_err(&pdev->dev, "wrong clock rate (%d)\n", clk_rate);
goto put_clks;
}
ret = clk_set_rate(bg_ptr->div_clk, clk_rate);
if (ret)
dev_err(&pdev->dev, "Cannot re-set clock rate. Continuing\n");
bg_ptr->clk_rate = clk_rate;
clk_enable(bg_ptr->fclock);
mutex_init(&bg_ptr->bg_mutex);
bg_ptr->dev = &pdev->dev;
platform_set_drvdata(pdev, bg_ptr);
omap_bandgap_power(bg_ptr, true);
/* Set default counter to 1 for now */
if (OMAP_BANDGAP_HAS(bg_ptr, COUNTER))
for (i = 0; i < bg_ptr->conf->sensor_count; i++)
configure_temp_sensor_counter(bg_ptr, i, 1);
for (i = 0; i < bg_ptr->conf->sensor_count; i++) {
struct temp_sensor_data *ts_data;
ts_data = bg_ptr->conf->sensors[i].ts_data;
if (OMAP_BANDGAP_HAS(bg_ptr, TALERT))
temp_sensor_init_talert_thresholds(bg_ptr, i,
ts_data->t_hot,
ts_data->t_cold);
if (OMAP_BANDGAP_HAS(bg_ptr, TSHUT_CONFIG)) {
temp_sensor_configure_tshut_hot(bg_ptr, i,
ts_data->tshut_hot);
temp_sensor_configure_tshut_cold(bg_ptr, i,
ts_data->tshut_cold);
}
}
if (OMAP_BANDGAP_HAS(bg_ptr, MODE_CONFIG))
enable_continuous_mode(bg_ptr);
//.........这里部分代码省略.........
开发者ID:AiWinters,项目名称:linux,代码行数:101,代码来源:omap-bandgap.c
示例8: omap_opp_register
/**
* omap_opp_register() - Initialize opp table as per the CPU type
* @dev: device registering for OPP
* @hwmod_name: hemod name of registering device
*
* Register the given device with the OPP/DVFS framework. Intended to
* be called when omap_device is built.
*/
int omap_opp_register(struct device *dev, const char *hwmod_name)
{
int i, r;
struct clk *clk;
long round_rate;
struct omap_opp_def *opp_def = opp_table;
u32 opp_def_size = opp_table_size;
if (!opp_def || !opp_def_size) {
pr_err("%s: invalid params!\n", __func__);
return -EINVAL;
}
if (IS_ERR(dev)) {
pr_err("%s: Unable to get dev pointer\n", __func__);
return -EINVAL;
}
/* Lets now register with OPP library */
for (i = 0; i < opp_def_size; i++, opp_def++) {
if (!opp_def->default_available)
continue;
if (!opp_def->dev_info->hwmod_name) {
WARN_ONCE(1, "%s: NULL name of omap_hwmod, failing [%d].\n",
__func__, i);
return -EINVAL;
}
if (!strcmp(hwmod_name, opp_def->dev_info->hwmod_name)) {
clk = omap_clk_get_by_name(opp_def->dev_info->clk_name);
if (clk) {
round_rate = clk_round_rate(clk, opp_def->freq);
if (round_rate > 0) {
opp_def->freq = round_rate;
} else {
pr_warn("%s: round_rate for clock %s failed\n",
__func__, opp_def->dev_info->clk_name);
continue; /* skip Bad OPP */
}
} else {
pr_warn("%s: No clock by name %s found\n",
__func__, opp_def->dev_info->clk_name);
continue; /* skip Bad OPP */
}
r = opp_add(dev, opp_def->freq, opp_def->u_volt);
if (r) {
dev_err(dev,
"%s: add OPP %ld failed for %s [%d] result=%d\n",
__func__, opp_def->freq,
opp_def->dev_info->hwmod_name, i, r);
continue;
}
r = omap_dvfs_register_device(dev,
opp_def->dev_info->voltdm_name,
opp_def->dev_info->clk_name);
if (r)
dev_err(dev, "%s:%s:err dvfs register %d %d\n",
__func__, opp_def->dev_info->hwmod_name,
r, i);
}
}
return 0;
}
开发者ID:SciAps,项目名称:android-kernel,代码行数:74,代码来源:opp.c
示例9: mx6_sabresd_board_init
//.........这里部分代码省略.........
}
imx6q_add_vpu();
imx6q_init_audio();
platform_device_register(&sabresd_vmmc_reg_devices);
imx_asrc_data.asrc_core_clk = clk_get(NULL, "asrc_clk");
imx_asrc_data.asrc_audio_clk = clk_get(NULL, "asrc_serial_clk");
imx6q_add_asrc(&imx_asrc_data);
/*
* Disable HannStar touch panel CABC function,
* this function turns the panel's backlight automatically
* according to the content shown on the panel which
* may cause annoying unstable backlight issue.
*/
//gpio_request(SABRESD_CABC_EN0, "cabc-en0");
//gpio_direction_output(SABRESD_CABC_EN0, 0);
//gpio_request(SABRESD_CABC_EN1, "cabc-en1");
//gpio_direction_output(SABRESD_CABC_EN1, 0);
imx6q_add_mxc_pwm(0);
imx6q_add_mxc_pwm(1);
imx6q_add_mxc_pwm(2);
imx6q_add_mxc_pwm(3);
imx6q_add_mxc_pwm_backlight(0, &mx6_sabresd_pwm_backlight_data);
imx6q_add_otp();
imx6q_add_viim();
imx6q_add_imx2_wdt(0, NULL);
imx6q_add_dma();
imx6q_add_dvfs_core(&sabresd_dvfscore_data);
if (imx_ion_data.heaps[0].size)
imx6q_add_ion(0, &imx_ion_data,
sizeof(imx_ion_data) + sizeof(struct ion_platform_heap));
imx6q_add_device_buttons();
///* enable sensor 3v3 and 1v8 */
//gpio_request(SABRESD_SENSOR_EN, "sensor-en");
//gpio_direction_output(SABRESD_SENSOR_EN, 1);
/* enable ecompass intr */
//gpio_request(SABRESD_eCOMPASS_INT, "ecompass-int");
//gpio_direction_input(SABRESD_eCOMPASS_INT);
/* enable light sensor intr */
//gpio_request(SABRESD_ALS_INT, "als-int");
//gpio_direction_input(SABRESD_ALS_INT);
imx6q_add_hdmi_soc();
imx6q_add_hdmi_soc_dai();
if (cpu_is_mx6dl()) {
imx6dl_add_imx_pxp();
imx6dl_add_imx_pxp_client();
}
clko2 = clk_get(NULL, "clko2_clk");
if (IS_ERR(clko2))
pr_err("can't get CLKO2 clock.\n");
new_parent = clk_get(NULL, "osc_clk");
if (!IS_ERR(new_parent)) {
clk_set_parent(clko2, new_parent);
clk_put(new_parent);
}
rate = clk_round_rate(clko2, 24000000);
clk_set_rate(clko2, rate);
clk_enable(clko2);
/* Camera and audio use osc clock */
clko = clk_get(NULL, "clko_clk");
if (!IS_ERR(clko))
clk_set_parent(clko, clko2);
/* Enable Aux_5V */
//gpio_request(SABRESD_AUX_5V_EN, "aux_5v_en");
//gpio_direction_output(SABRESD_AUX_5V_EN, 1);
//gpio_set_value(SABRESD_AUX_5V_EN, 1);
//gps_power_on(true);
/* Register charger chips */
platform_device_register(&sabresd_max8903_charger_1);
//pm_power_off = mx6_snvs_poweroff;
pm_power_off = arch_poweroff;
imx6q_add_busfreq();
/* Add PCIe RC interface support
* uart5 has pin mux with pcie. or you will use uart5 or use pcie
*/
if (cpu_is_mx6dl()) {
mxc_iomux_v3_setup_multiple_pads(mx6dl_arm2_elan_pads,
ARRAY_SIZE(mx6dl_arm2_elan_pads));
}
imx6_add_armpmu();
imx6q_add_perfmon(0);
imx6q_add_perfmon(1);
imx6q_add_perfmon(2);
}
开发者ID:RealDigitalMedia,项目名称:linux-shuttle,代码行数:101,代码来源:board-mx6q_dsa2lb.c
示例10: sh_mipi_probe
static int __init sh_mipi_probe(struct platform_device *pdev)
{
struct sh_mipi *mipi;
struct sh_mipi_dsi_info *pdata = pdev->dev.platform_data;
struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
struct resource *res2 = platform_get_resource(pdev, IORESOURCE_MEM, 1);
unsigned long rate, f_current;
int idx = pdev->id, ret;
if (!res || !res2 || idx >= ARRAY_SIZE(mipi_dsi) || !pdata)
return -ENODEV;
if (!pdata->set_dot_clock)
return -EINVAL;
mutex_lock(&array_lock);
if (idx < 0)
for (idx = 0; idx < ARRAY_SIZE(mipi_dsi) && mipi_dsi[idx]; idx++)
;
if (idx == ARRAY_SIZE(mipi_dsi)) {
ret = -EBUSY;
goto efindslot;
}
mipi = kzalloc(sizeof(*mipi), GFP_KERNEL);
if (!mipi) {
ret = -ENOMEM;
goto ealloc;
}
mipi->entity.owner = THIS_MODULE;
mipi->entity.ops = &mipi_ops;
if (!request_mem_region(res->start, resource_size(res), pdev->name)) {
dev_err(&pdev->dev, "MIPI register region already claimed\n");
ret = -EBUSY;
goto ereqreg;
}
mipi->base = ioremap(res->start, resource_size(res));
if (!mipi->base) {
ret = -ENOMEM;
goto emap;
}
if (!request_mem_region(res2->start, resource_size(res2), pdev->name)) {
dev_err(&pdev->dev, "MIPI register region 2 already claimed\n");
ret = -EBUSY;
goto ereqreg2;
}
mipi->linkbase = ioremap(res2->start, resource_size(res2));
if (!mipi->linkbase) {
ret = -ENOMEM;
goto emap2;
}
mipi->pdev = pdev;
mipi->dsit_clk = clk_get(&pdev->dev, "dsit_clk");
if (IS_ERR(mipi->dsit_clk)) {
ret = PTR_ERR(mipi->dsit_clk);
goto eclktget;
}
f_current = clk_get_rate(mipi->dsit_clk);
/* 80MHz required by the datasheet */
rate = clk_round_rate(mipi->dsit_clk, 80000000);
if (rate > 0 && rate != f_current)
ret = clk_set_rate(mipi->dsit_clk, rate);
else
ret = rate;
if (ret < 0)
goto esettrate;
dev_dbg(&pdev->dev, "DSI-T clk %lu -> %lu\n", f_current, rate);
ret = clk_enable(mipi->dsit_clk);
if (ret < 0)
goto eclkton;
mipi_dsi[idx] = mipi;
pm_runtime_enable(&pdev->dev);
pm_runtime_resume(&pdev->dev);
mutex_unlock(&array_lock);
platform_set_drvdata(pdev, &mipi->entity);
return 0;
eclkton:
esettrate:
clk_put(mipi->dsit_clk);
eclktget:
iounmap(mipi->linkbase);
emap2:
release_mem_region(res2->start, resource_size(res2));
ereqreg2:
//.........这里部分代码省略.........
开发者ID:020gzh,项目名称:linux,代码行数:101,代码来源:sh_mipi_dsi.c
示例11: mackerel_init
//.........这里部分代码省略.........
gpio_request_one(151, GPIOF_OUT_INIT_HIGH, NULL); /* LCDDON */
/* USBHS0 */
gpio_request(GPIO_FN_VBUS0_0, NULL);
gpio_request_pulldown(GPIO_PORT168CR); /* VBUS0_0 pull down */
/* USBHS1 */
gpio_request(GPIO_FN_VBUS0_1, NULL);
gpio_request_pulldown(GPIO_PORT167CR); /* VBUS0_1 pull down */
gpio_request(GPIO_FN_IDIN_1_113, NULL);
/* enable FSI2 port A (ak4643) */
gpio_request(GPIO_FN_FSIAIBT, NULL);
gpio_request(GPIO_FN_FSIAILR, NULL);
gpio_request(GPIO_FN_FSIAISLD, NULL);
gpio_request(GPIO_FN_FSIAOSLD, NULL);
gpio_request_one(161, GPIOF_OUT_INIT_LOW, NULL); /* slave */
gpio_request(9, NULL);
gpio_request(10, NULL);
gpio_direction_none(GPIO_PORT9CR); /* FSIAOBT needs no direction */
gpio_direction_none(GPIO_PORT10CR); /* FSIAOLR needs no direction */
intc_set_priority(IRQ_FSI, 3); /* irq priority FSI(3) > SMSC911X(2) */
/* setup FSI2 port B (HDMI) */
gpio_request(GPIO_FN_FSIBCK, NULL);
__raw_writew(__raw_readw(USCCR1) & ~(1 << 6), USCCR1); /* use SPDIF */
/* set SPU2 clock to 119.6 MHz */
clk = clk_get(NULL, "spu_clk");
if (!IS_ERR(clk)) {
clk_set_rate(clk, clk_round_rate(clk, 119600000));
clk_put(clk);
}
/* enable Keypad */
gpio_request(GPIO_FN_IRQ9_42, NULL);
irq_set_irq_type(IRQ9, IRQ_TYPE_LEVEL_HIGH);
/* enable Touchscreen */
gpio_request(GPIO_FN_IRQ7_40, NULL);
irq_set_irq_type(IRQ7, IRQ_TYPE_LEVEL_LOW);
/* enable Accelerometer */
gpio_request(GPIO_FN_IRQ21, NULL);
irq_set_irq_type(IRQ21, IRQ_TYPE_LEVEL_HIGH);
/* SDHI0 PORT172 card-detect IRQ26 */
gpio_request(GPIO_FN_IRQ26_172, NULL);
/* FLCTL */
gpio_request(GPIO_FN_D0_NAF0, NULL);
gpio_request(GPIO_FN_D1_NAF1, NULL);
gpio_request(GPIO_FN_D2_NAF2, NULL);
gpio_request(GPIO_FN_D3_NAF3, NULL);
gpio_request(GPIO_FN_D4_NAF4, NULL);
gpio_request(GPIO_FN_D5_NAF5, NULL);
gpio_request(GPIO_FN_D6_NAF6, NULL);
gpio_request(GPIO_FN_D7_NAF7, NULL);
gpio_request(GPIO_FN_D8_NAF8, NULL);
gpio_request(GPIO_FN_D9_NAF9, NULL);
gpio_request(GPIO_FN_D10_NAF10, NULL);
gpio_request(GPIO_FN_D11_NAF11, NULL);
gpio_request(GPIO_FN_D12_NAF12, NULL);
开发者ID:0x000000FF,项目名称:Linux4Edison,代码行数:67,代码来源:board-mackerel.c
示例12: arch_setup
//.........这里部分代码省略.........
gpio_direction_input(GPIO_PTW7);
cn12_enabled = true;
#endif
if (cn12_enabled)
/* I/O buffer drive ability is high for CN12 */
__raw_writew((__raw_readw(IODRIVEA) & ~0x3000) | 0x2000,
IODRIVEA);
/* enable Video */
gpio_request(GPIO_PTU2, NULL);
gpio_direction_output(GPIO_PTU2, 1);
/* enable Camera */
gpio_request(GPIO_PTA3, NULL);
gpio_request(GPIO_PTA4, NULL);
gpio_direction_output(GPIO_PTA3, 0);
gpio_direction_output(GPIO_PTA4, 0);
/* enable FSI */
gpio_request(GPIO_FN_FSIMCKB, NULL);
gpio_request(GPIO_FN_FSIIBSD, NULL);
gpio_request(GPIO_FN_FSIOBSD, NULL);
gpio_request(GPIO_FN_FSIIBBCK, NULL);
gpio_request(GPIO_FN_FSIIBLRCK, NULL);
gpio_request(GPIO_FN_FSIOBBCK, NULL);
gpio_request(GPIO_FN_FSIOBLRCK, NULL);
gpio_request(GPIO_FN_CLKAUDIOBO, NULL);
/* set SPU2 clock to 83.4 MHz */
clk = clk_get(NULL, "spu_clk");
if (!IS_ERR(clk)) {
clk_set_rate(clk, clk_round_rate(clk, 83333333));
clk_put(clk);
}
/* change parent of FSI B */
clk = clk_get(NULL, "fsib_clk");
if (!IS_ERR(clk)) {
/* 48kHz dummy clock was used to make sure 1/1 divide */
clk_set_rate(&sh7724_fsimckb_clk, 48000);
clk_set_parent(clk, &sh7724_fsimckb_clk);
clk_set_rate(clk, 48000);
clk_put(clk);
}
gpio_request(GPIO_PTU0, NULL);
gpio_direction_output(GPIO_PTU0, 0);
mdelay(20);
/* enable motion sensor */
gpio_request(GPIO_FN_INTC_IRQ1, NULL);
gpio_direction_input(GPIO_FN_INTC_IRQ1);
/* set VPU clock to 166 MHz */
clk = clk_get(NULL, "vpu_clk");
if (!IS_ERR(clk)) {
clk_set_rate(clk, clk_round_rate(clk, 166000000));
clk_put(clk);
}
/* enable IrDA */
gpio_request(GPIO_FN_IRDA_OUT, NULL);
gpio_request(GPIO_FN_IRDA_IN, NULL);
gpio_request(GPIO_PTU5, NULL);
开发者ID:AllenWeb,项目名称:linux,代码行数:67,代码来源:setup.c
示例13: EnableSGXClocks
PVRSRV_ERROR EnableSGXClocks(SYS_DATA *psSysData)
{
#if !defined(NO_HARDWARE)
SYS_SPECIFIC_DATA *psSysSpecData = (SYS_SPECIFIC_DATA *) psSysData->pvSysSpecificData;
#if !defined(PM_RUNTIME_SUPPORT)
IMG_INT res;
long lRate,lNewRate;
#endif
if (atomic_read(&psSysSpecData->sSGXClocksEnabled) != 0)
{
return PVRSRV_OK;
}
#if !defined(PM_RUNTIME_SUPPORT)
PVR_DPF((PVR_DBG_MESSAGE, "EnableSGXClocks: Enabling SGX Clocks"));
res=clk_enable(psSysSpecData->psSGX_FCK);
if (res < 0)
{
PVR_DPF((PVR_DBG_ERROR, "EnableSGXClocks: Couldn't enable SGX functional clock (%d)", res));
return PVRSRV_ERROR_UNABLE_TO_ENABLE_CLOCK;
}
lNewRate = clk_round_rate(psSysSpecData->psSGX_FCK, SYS_SGX_CLOCK_SPEED + ONE_MHZ);
if (lNewRate <= 0)
{
PVR_DPF((PVR_DBG_ERROR, "EnableSGXClocks: Couldn't round SGX functional clock rate"));
return PVRSRV_ERROR_UNABLE_TO_ROUND_CLOCK_RATE;
}
lRate = clk_get_rate(psSysSpecData->psSGX_FCK);
if (lRate != lNewRate)
{
res = clk_set_rate(psSysSpecData->psSGX_FCK, lNewRate);
if (res < 0)
{
PVR_DPF((PVR_DBG_WARNING, "EnableSGXClocks: Couldn't set SGX functional clock rate (%d)", res));
return PVRSRV_ERROR_UNABLE_TO_SET_CLOCK_RATE;
}
}
#if defined(DEBUG)
{
IMG_UINT32 rate = clk_get_rate(psSysSpecData->psSGX_FCK);
PVR_DPF((PVR_DBG_MESSAGE, "EnableSGXClocks: SGX Functional Clock is %dMhz", HZ_TO_MHZ(rate)));
}
#endif
#endif
#if defined(LDM_PLATFORM) && !defined(PVR_DRI_DRM_NOT_PCI)
#if defined(PM_RUNTIME_SUPPORT)
{
int res = pm_runtime_get_sync(&gpsPVRLDMDev->dev);
if (res < 0)
{
PVR_DPF((PVR_DBG_ERROR, "EnableSGXClocks: pm_runtime_get_sync failed (%d)", -res));
return PVRSRV_ERROR_UNABLE_TO_ENABLE_CLOCK;
}
}
#endif
#endif
atomic_set(&psSysSpecData->sSGXClocksEnabled, 1);
#else
PVR_UNREFERENCED_PARAMETER(psSysData);
#endif
return PVRSRV_OK;
}
开发者ID:fernandorocha,项目名称:ti-sdk-pvr,代码行数:69,代码来源:sysutils_linux.c
示例14: nvhost_scale3d_actmon_init
void nvhost_scale3d_actmon_init(struct platform_device *dev)
{
struct nvhost_devfreq_ext_stat *ext_stat;
struct nvhost_device_data *pdata = platform_get_drvdata(dev);
if (power_profile.init)
return;
/* Get clocks */
power_profile.dev = dev;
power_profile.clk_3d = pdata->clk[0];
if (tegra_get_chipid() == TEGRA_CHIPID_TEGRA3) {
power_profile.clk_3d2 = pdata->clk[1];
power_profile.clk_3d_emc = pdata->clk[2];
} else
power_profile.clk_3d_emc = pdata->clk[1];
/* Get frequency settings */
power_profile.max_rate_3d =
clk_round_rate(power_profile.clk_3d, UINT_MAX);
power_profile.min_rate_3d =
clk_round_rate(power_profile.clk_3d, 0);
nvhost_scale3d_devfreq_profile.initial_freq = power_profile.max_rate_3d;
if (power_profile.max_rate_3d == power_profile.min_rate_3d) {
pr_warn("scale3d: 3d max rate = min rate (%lu), disabling\n",
power_profile.max_rate_3d);
goto err_bad_power_profile;
}
/* Reserve space for devfreq structures (dev_stat and ext_dev_stat) */
power_profile.dev_stat =
kzalloc(sizeof(struct power_profile_gr3d), GFP_KERNEL);
if (!power_profile.dev_stat)
goto err_devfreq_alloc;
ext_stat = kzalloc(sizeof(struct nvhost_devfreq_ext_stat), GFP_KERNEL);
if (!ext_stat)
goto err_devfreq_ext_stat_alloc;
/* Initialise the dev_stat and ext_stat structures */
power_profile.dev_stat->private_data = ext_stat;
power_profile.last_event_type = DEVICE_UNKNOWN;
ext_stat->min_freq = power_profile.min_rate_3d;
ext_stat->max_freq = power_profile.max_rate_3d;
power_profile.last_request_time = ktime_get();
nvhost_scale3d_calibrate_emc();
/* Start using devfreq */
pdata->power_manager = devfreq_add_device(&dev->dev,
&nvhost_scale3d_devfreq_profile,
&nvhost_podgov,
NULL);
power_profile.init = 1;
return;
err_devfreq_ext_stat_alloc:
kfree(power_profile.dev_stat);
err_devfreq_alloc:
err_bad_power_profile:
return;
}
开发者ID:Mrchenkeyu,项目名称:android_kernel_zte_pluto,代码行数:67,代码来源:scale3d_actmon.c
示例15: kgsl_pwrctrl_init
int kgsl_pwrctrl_init(struct kgsl_device *device)
{
int i, result = 0;
struct clk *clk;
struct platform_device *pdev =
container_of(device->parentdev, struct platform_device, dev);
struct kgsl_pwrctrl *pwr = &device->pwrctrl;
struct kgsl_device_platform_data *pdata_dev = pdev->dev.platform_data;
struct kgsl_device_pwr_data *pdata_pwr = &pdata_dev->pwr_data;
const char *clk_names[KGSL_MAX_CLKS] = {pwr->src_clk_name,
pdata_dev->clk.name.clk,
pdata_dev->clk.name.pclk,
pdata_dev->imem_clk_name.clk,
pdata_dev->imem_clk_name.pclk};
/*acquire clocks */
for (i = 1; i < KGSL_MAX_CLKS; i++) {
if (clk_names[i]) {
clk = clk_get(&pdev->dev, clk_names[i]);
if (IS_ERR(clk))
goto clk_err;
pwr->grp_clks[i] = clk;
}
}
/* Make sure we have a source clk for freq setting */
clk = clk_get(&pdev->dev, clk_names[0]);
pwr->grp_clks[0] = (IS_ERR(clk)) ? pwr->grp_clks[1] : clk;
/* put the AXI bus into asynchronous mode with the graphics cores */
if (pdata_pwr->set_grp_async != NULL)
pdata_pwr->set_grp_async();
if (pdata_pwr->num_levels > KGSL_MAX_PWRLEVELS) {
KGSL_PWR_ERR(device, "invalid power level count: %d\n",
pdata_pwr->num_levels);
result = -EINVAL;
goto done;
}
pwr->num_pwrlevels = pdata_pwr->num_levels;
pwr->active_pwrlevel = pdata_pwr->init_level;
for (i = 0; i < pdata_pwr->num_levels; i++) {
pwr->pwrlevels[i].gpu_freq =
(pdata_pwr->pwrlevel[i].gpu_freq > 0) ?
clk_round_rate(pwr->grp_clks[0],
pdata_pwr->pwrlevel[i].
gpu_freq) : 0;
pwr->pwrlevels[i].bus_freq =
pdata_pwr->pwrlevel[i].bus_freq;
}
/* Do not set_rate for targets in sync with AXI */
if (pwr->pwrlevels[0].gpu_freq > 0)
clk_set_rate(pwr->grp_clks[0], pwr->
pwrlevels[pwr->num_pwrlevels - 1].gpu_freq);
pwr->gpu_reg = regulator_get(NULL, pwr->regulator_name);
if (IS_ERR(pwr->gpu_reg))
pwr->gpu_reg = NULL;
if (internal_pwr_rail_mode(device->pwrctrl.pwr_rail,
PWR_RAIL_CTL_MANUAL)) {
KGSL_PWR_ERR(device, "internal_pwr_rail_mode failed\n");
result = -EINVAL;
goto done;
}
pwr->power_flags = 0;
pwr->nap_allowed = pdata_pwr->nap_allowed;
pwr->interval_timeout = pdata_pwr->idle_timeout;
pwr->ebi1_clk = clk_get(&pdev->dev, "bus_clk");
if (IS_ERR(pwr->ebi1_clk))
pwr->ebi1_clk = NULL;
else
clk_set_rate(pwr->ebi1_clk,
pwr->pwrlevels[pwr->active_pwrlevel].
bus_freq);
// pm_qos_add_request(PM_QOS_SYSTEM_BUS_FREQ,
// PM_QOS_DEFAULT_VALUE);
/*acquire interrupt */
pwr->interrupt_num =
platform_get_irq_byname(pdev, pwr->irq_name);
if (pwr->interrupt_num <= 0) {
KGSL_PWR_ERR(device, "platform_get_irq_byname failed: %d\n",
pwr->interrupt_num);
result = -EINVAL;
goto done;
}
register_early_suspend(&device->display_off);
return result;
clk_err:
result = PTR_ERR(clk);
KGSL_PWR_ERR(device, "clk_get(%s) failed: %d\n",
clk_names[i], result);
done:
return result;
//.........这里部分代码省略.........
开发者ID:Dm47021,项目名称:AlienKernel4Jellybean,代码行数:101,代码来源:kgsl_pwrctrl.c
示例16: mackerel_init
static void __init mackerel_init(void)
{
struct pm_domain_device domain_devices[] = {
{ "A4LC", &lcdc_device, },
{ "A4LC", &hdmi_lcdc_device, },
{ "A4LC", &meram_device, },
{ "A4MP", &fsi_device, },
{ "A3SP", &usbhs0_device, },
{ "A3SP", &usbhs1_device, },
{ "A3SP", &nand_flash_device, },
{ "A3SP", &sdhi0_device, },
#if !IS_ENABLED(CONFIG_MMC_SH_MMCIF)
{ "A3SP", &sdhi1_device, },
#else
{ "A3SP", &sh_mmcif_device, },
#endif
{ "A3SP", &sdhi2_device, },
{ "A4R", &ceu_device, },
};
u32 srcr4;
struct clk *clk;
regulator_register_always_on(0, "fixed-1.8V", fixed1v8_power_consumers,
ARRAY_SIZE(fixed1v8_power_consumers), 1800000);
regulator_register_always_on(1, "fixed-3.3V", fixed3v3_power_consumers,
ARRAY_SIZE(fixed3v3_power_consumers), 3300000);
regulator_register_fixed(2, dummy_supplies, ARRAY_SIZE(dummy_supplies));
/* External clock source */
clk_set_rate(&sh7372_dv_clki_clk, 27000000);
pinctrl_register_mappings(mackerel_pinctrl_map,
ARRAY_SIZE(mackerel_pinctrl_map));
sh7372_pinmux_init();
gpio_request_one(151, GPIOF_OUT_INIT_HIGH, NULL); /* LCDDON */
/* USBHS0 */
gpio_request_pulldown(GPIO_PORT168CR); /* VBUS0_0 pull down */
/* USBHS1 */
gpio_request_pulldown(GPIO_PORT167CR); /* VBUS0_1 pull down */
/* FSI2 port A (ak4643) */
gpio_request_one(161, GPIOF_OUT_INIT_LOW, NULL); /* slave */
gpio_request(9, NULL);
gpio_request(10, NULL);
gpio_direction_none(GPIO_PORT9CR); /* FSIAOBT needs no direction */
gpio_direction_none(GPIO_PORT10CR); /* FSIAOLR needs no direction */
intc_set_priority(IRQ_FSI, 3); /* irq priority FSI(3) > SMSC911X(2) */
/* FSI2 port B (HDMI) */
__raw_writew(__raw_readw(USCCR1) & ~(1 << 6), USCCR1); /* use SPDIF */
/* set SPU2 clock to 119.6 MHz */
clk = clk_get(NULL, "spu_clk");
if (!IS_ERR(clk)) {
clk_set_rate(clk, clk_round_rate(clk, 119600000));
clk_put(clk);
}
/* Keypad */
irq_set_irq_type(IRQ9, IRQ_TYPE_LEVEL_HIGH);
/* Touchscreen */
irq_set_irq_type(IRQ7, IRQ_TYPE_LEVEL_LOW);
/* Accelerometer */
irq_set_irq_type(IRQ21, IRQ_TYPE_LEVEL_HIGH);
/* Reset HDMI, must be held at least one EXTALR (32768Hz) period */
srcr4 = __raw_readl(SRCR4);
__raw_writel(srcr4 | (1 << 13), SRCR4);
udelay(50);
__raw_writel(srcr4 & ~(1 << 13), SRCR4);
i2c_register_board_info(0, i2c0_devices,
ARRAY_SIZE(i2c0_devices));
i2c_register_board_info(1, i2c1_devices,
ARRAY_SIZE(i2c1_devices));
sh7372_add_standard_devices();
platform_add_devices(mackerel_devices, ARRAY_SIZE(mackerel_devices));
rmobile_add_devices_to_domains(domain_devices,
ARRAY_SIZE(domain_devices));
hdmi_init_pm_clock();
sh7372_pm_init();
pm_clk_add(&fsi_device.dev, "spu2");
pm_clk_add(&hdmi_lcdc_device.dev, "hdmi");
}
开发者ID:03199618,项目名称:linux,代码行数:95,代码来源:board-mackerel.c
示例17: mdp4_dtv_round_pixclk
long mdp4_dtv_round_pixclk(struct drm_encoder *encoder, unsigned long rate)
{
struct mdp4_dtv_encoder *mdp4_dtv_encoder = to_mdp4_dtv_encoder(encoder);
return clk_round_rate(mdp4_dtv_encoder->src_clk, rate);
}
开发者ID:020gzh,项目名称:linux,代码行数:5,代码来源:mdp4_dtv_encoder.c
|
请发表评论