本文整理汇总了C++中sbus_writeb函数的典型用法代码示例。如果您正苦于以下问题：C++ sbus_writeb函数的具体用法？C++ sbus_writeb怎么用？C++ sbus_writeb使用的例子？那么恭喜您, 这里精选的函数代码示例或许可以为您提供帮助。
在下文中一共展示了sbus_writeb函数的20个代码示例，这些例子默认根据受欢迎程度排序。您可以为喜欢或者感觉有用的代码点赞，您的评价将有助于我们的系统推荐出更棒的C++代码示例。
示例1: set_auxio
void set_auxio(unsigned char bits_on, unsigned char bits_off)
{
unsigned char regval;
unsigned long flags;
spin_lock_irqsave(&auxio_lock, flags);
switch(sparc_cpu_model) {
case sun4c:
regval = sbus_readb(auxio_register);
sbus_writeb(((regval | bits_on) & ~bits_off) | AUXIO_ORMEIN,
auxio_register);
break;
case sun4m:
if(!auxio_register)
break;
regval = sbus_readb(auxio_register);
sbus_writeb(((regval | bits_on) & ~bits_off) | AUXIO_ORMEIN4M,
auxio_register);
break;
case sun4d:
break;
default:
panic("Can't set AUXIO register on this machine.");
}
spin_unlock_irqrestore(&auxio_lock, flags);
}
开发者ID:DirtyDroidX，项目名称:android_kernel_htc_m8ul，代码行数:25，代码来源:auxio_32.c
示例2: bw2_blank
/**
* bw2_blank - Optional function. Blanks the display.
* @blank_mode: the blank mode we want.
* @info: frame buffer structure that represents a single frame buffer
*/
static int
bw2_blank(int blank, struct fb_info *info)
{
struct bw2_par *par = (struct bw2_par *) info->par;
struct bw2_regs __iomem *regs = par->regs;
unsigned long flags;
u8 val;
spin_lock_irqsave(&par->lock, flags);
switch (blank) {
case FB_BLANK_UNBLANK: /* Unblanking */
val = sbus_readb(®s->control);
val |= BWTWO_CTL_ENABLE_VIDEO;
sbus_writeb(val, ®s->control);
par->flags &= ~BW2_FLAG_BLANKED;
break;
case FB_BLANK_NORMAL: /* Normal blanking */
case FB_BLANK_VSYNC_SUSPEND: /* VESA blank (vsync off) */
case FB_BLANK_HSYNC_SUSPEND: /* VESA blank (hsync off) */
case FB_BLANK_POWERDOWN: /* Poweroff */
val = sbus_readb(®s->control);
val &= ~BWTWO_CTL_ENABLE_VIDEO;
sbus_writeb(val, ®s->control);
par->flags |= BW2_FLAG_BLANKED;
break;
}
spin_unlock_irqrestore(&par->lock, flags);
return 0;
}
开发者ID:3null，项目名称:linux，代码行数:38，代码来源:bw2.c
示例3: set_pins
static void set_pins(unsigned short pins, unsigned minor)
{
void __iomem *base = base_addrs[minor];
unsigned char bits_tcr = 0, bits_or = 0;
if (instances[minor].direction & 0x20) bits_tcr |= P_TCR_DIR;
if ( pins & BPP_PP_nStrobe) bits_tcr |= P_TCR_DS;
if ( pins & BPP_PP_nAutoFd) bits_or |= P_OR_AFXN;
if (! (pins & BPP_PP_nInit)) bits_or |= P_OR_INIT;
if (! (pins & BPP_PP_nSelectIn)) bits_or |= P_OR_SLCT_IN;
sbus_writeb(bits_or, base + BPP_OR);
sbus_writeb(bits_tcr, base + BPP_TCR);
}
开发者ID:274914765，项目名称:C，代码行数:15，代码来源:bpp.c
示例4: sun4c_init_IRQ
void __init sun4c_init_IRQ(void)
{
struct device_node *dp;
const u32 *addr;
dp = of_find_node_by_name(NULL, "interrupt-enable");
if (!dp) {
prom_printf("sun4c_init_IRQ: Unable to find interrupt-enable\n");
prom_halt();
}
addr = of_get_property(dp, "address", NULL);
of_node_put(dp);
if (!addr) {
prom_printf("sun4c_init_IRQ: No address property\n");
prom_halt();
}
interrupt_enable = (void __iomem *) (unsigned long) addr[0];
BTFIXUPSET_CALL(clear_clock_irq, sun4c_clear_clock_irq, BTFIXUPCALL_NORM);
BTFIXUPSET_CALL(load_profile_irq, sun4c_load_profile_irq, BTFIXUPCALL_NOP);
sparc_irq_config.init_timers = sun4c_init_timers;
sparc_irq_config.build_device_irq = sun4c_build_device_irq;
#ifdef CONFIG_SMP
BTFIXUPSET_CALL(set_cpu_int, sun4c_nop, BTFIXUPCALL_NOP);
BTFIXUPSET_CALL(clear_cpu_int, sun4c_nop, BTFIXUPCALL_NOP);
BTFIXUPSET_CALL(set_irq_udt, sun4c_nop, BTFIXUPCALL_NOP);
#endif
sbus_writeb(SUN4C_INT_ENABLE, interrupt_enable);
/* Cannot enable interrupts until OBP ticker is disabled. */
}
开发者ID:08opt，项目名称:linux，代码行数:34，代码来源:sun4c_irq.c
示例5: __cg14_reset
static void __cg14_reset(struct cg14_par *par)
{
struct cg14_regs __iomem *regs = par->regs;
u8 val;
val = sbus_readb(®s->mcr);
val &= ~(CG14_MCR_PIXMODE_MASK);
sbus_writeb(val, ®s->mcr);
}
开发者ID:Antonio-Zhou，项目名称:Linux-2.6.11，代码行数:9，代码来源:cg14.c
示例6: cg3_unblank
static void cg3_unblank (struct fb_info_sbusfb *fb)
{
unsigned long flags;
u8 tmp;
spin_lock_irqsave(&fb->lock, flags);
tmp = sbus_readb(&fb->s.cg3.regs->control);
tmp |= CG3_CR_ENABLE_VIDEO;
sbus_writeb(tmp, &fb->s.cg3.regs->control);
spin_unlock_irqrestore(&fb->lock, flags);
}
开发者ID:houzhenggang，项目名称:ralink_sdk，代码行数:11，代码来源:cgthreefb.c
示例7: bw2_blank
static void bw2_blank (struct fb_info_sbusfb *fb)
{
unsigned long flags;
u8 tmp;
spin_lock_irqsave(&fb->lock, flags);
tmp = sbus_readb(&fb->s.bw2.regs->control);
tmp &= ~BWTWO_CTL_ENABLE_VIDEO;
sbus_writeb(tmp, &fb->s.bw2.regs->control);
spin_unlock_irqrestore(&fb->lock, flags);
}
开发者ID:dmgerman，项目名称:original，代码行数:11，代码来源:bwtwofb.c
示例8: sun4c_unmask_irq
static void sun4c_unmask_irq(struct irq_data *data)
{
unsigned long mask = (unsigned long)data->chip_data;
if (mask) {
unsigned long flags;
local_irq_save(flags);
mask = sbus_readb(interrupt_enable) | mask;
sbus_writeb(mask, interrupt_enable);
local_irq_restore(flags);
}
}
开发者ID:08opt，项目名称:linux，代码行数:13，代码来源:sun4c_irq.c
示例9: bw2_do_default_mode
static int __devinit bw2_do_default_mode(struct bw2_par *par,
struct fb_info *info,
int *linebytes)
{
u8 status, mon;
u8 *p;
status = sbus_readb(&par->regs->status);
mon = status & BWTWO_SR_RES_MASK;
switch (status & BWTWO_SR_ID_MASK) {
case BWTWO_SR_ID_MONO_ECL:
if (mon == BWTWO_SR_1600_1280) {
p = bw2regs_1600;
info->var.xres = info->var.xres_virtual = 1600;
info->var.yres = info->var.yres_virtual = 1280;
*linebytes = 1600 / 8;
} else
p = bw2regs_ecl;
break;
case BWTWO_SR_ID_MONO:
p = bw2regs_analog;
break;
case BWTWO_SR_ID_MSYNC:
if (mon == BWTWO_SR_1152_900_76_A ||
mon == BWTWO_SR_1152_900_76_B)
p = bw2regs_76hz;
else
p = bw2regs_66hz;
break;
case BWTWO_SR_ID_NOCONN:
return 0;
default:
printk(KERN_ERR "bw2: can't handle SR %02x\n",
status);
return -EINVAL;
}
for ( ; *p; p += 2) {
u8 __iomem *regp = &((u8 __iomem *)par->regs)[p[0]];
sbus_writeb(p[1], regp);
}
return 0;
}
开发者ID:12rafael，项目名称:jellytimekernel，代码行数:46，代码来源:bw2.c
示例10: __auxio_sbus_set
static void __auxio_sbus_set(u8 bits_on, u8 bits_off)
{
if (auxio_register) {
unsigned char regval;
unsigned long flags;
unsigned char newval;
spin_lock_irqsave(&auxio_lock, flags);
regval = sbus_readb(auxio_register);
newval = regval | bits_on;
newval &= ~bits_off;
newval &= ~AUXIO_AUX1_MASK;
sbus_writeb(newval, auxio_register);
spin_unlock_irqrestore(&auxio_lock, flags);
}
}
开发者ID:Antonio-Zhou，项目名称:Linux-2.6.11，代码行数:18，代码来源:auxio.c
示例11: qe_set_multicast
static void qe_set_multicast(struct net_device *dev)
{
struct sunqe *qep = netdev_priv(dev);
struct netdev_hw_addr *ha;
u8 new_mconfig = qep->mconfig;
char *addrs;
int i;
u32 crc;
/* Lock out others. */
netif_stop_queue(dev);
if ((dev->flags & IFF_ALLMULTI) || (netdev_mc_count(dev) > 64)) {
sbus_writeb(MREGS_IACONFIG_ACHNGE | MREGS_IACONFIG_LARESET,
qep->mregs + MREGS_IACONFIG);
while ((sbus_readb(qep->mregs + MREGS_IACONFIG) & MREGS_IACONFIG_ACHNGE) != 0)
barrier();
for (i = 0; i < 8; i++)
sbus_writeb(0xff, qep->mregs + MREGS_FILTER);
sbus_writeb(0, qep->mregs + MREGS_IACONFIG);
} else if (dev->flags & IFF_PROMISC) {
new_mconfig |= MREGS_MCONFIG_PROMISC;
} else {
u16 hash_table[4];
u8 *hbytes = (unsigned char *) &hash_table[0];
memset(hash_table, 0, sizeof(hash_table));
netdev_for_each_mc_addr(ha, dev) {
addrs = ha->addr;
if (!(*addrs & 1))
continue;
crc = ether_crc_le(6, addrs);
crc >>= 26;
hash_table[crc >> 4] |= 1 << (crc & 0xf);
}
/* Program the qe with the new filter value. */
sbus_writeb(MREGS_IACONFIG_ACHNGE | MREGS_IACONFIG_LARESET,
qep->mregs + MREGS_IACONFIG);
while ((sbus_readb(qep->mregs + MREGS_IACONFIG) & MREGS_IACONFIG_ACHNGE) != 0)
barrier();
for (i = 0; i < 8; i++) {
u8 tmp = *hbytes++;
sbus_writeb(tmp, qep->mregs + MREGS_FILTER);
}
sbus_writeb(0, qep->mregs + MREGS_IACONFIG);
}
开发者ID:Medvedroid，项目名称:OT_903D-kernel-2.6.35.7，代码行数:47，代码来源:sunqe.c
示例12: cg3_loadcmap
static void cg3_loadcmap (struct fb_info_sbusfb *fb, struct display *p, int index, int count)
{
struct bt_regs *bt = &fb->s.cg3.regs->cmap;
unsigned long flags;
u32 *i;
volatile u8 *regp;
int steps;
spin_lock_irqsave(&fb->lock, flags);
i = (((u32 *)fb->color_map) + D4M3(index));
steps = D4M3(index+count-1) - D4M3(index)+3;
regp = (volatile u8 *)&bt->addr;
sbus_writeb(D4M4(index), regp);
while (steps--) {
u32 val = *i++;
sbus_writel(val, &bt->color_map);
}
spin_unlock_irqrestore(&fb->lock, flags);
}
开发者ID:houzhenggang，项目名称:ralink_sdk，代码行数:22，代码来源:cgthreefb.c
示例13: qe_stop
static inline int qe_stop(struct sunqe *qep)
{
void __iomem *cregs = qep->qcregs;
void __iomem *mregs = qep->mregs;
int tries;
/* Reset the MACE, then the QEC channel. */
sbus_writeb(MREGS_BCONFIG_RESET, mregs + MREGS_BCONFIG);
tries = MACE_RESET_RETRIES;
while (--tries) {
u8 tmp = sbus_readb(mregs + MREGS_BCONFIG);
if (tmp & MREGS_BCONFIG_RESET) {
udelay(20);
continue;
}
break;
}
if (!tries) {
printk(KERN_ERR "QuadEther: AIEEE cannot reset the MACE!\n");
return -1;
}
sbus_writel(CREG_CTRL_RESET, cregs + CREG_CTRL);
tries = QE_RESET_RETRIES;
while (--tries) {
u32 tmp = sbus_readl(cregs + CREG_CTRL);
if (tmp & CREG_CTRL_RESET) {
udelay(20);
continue;
}
break;
}
if (!tries) {
printk(KERN_ERR "QuadEther: Cannot reset QE channel!\n");
return -1;
}
return 0;
}
开发者ID:Lyude，项目名称:linux，代码行数:38，代码来源:sunqe.c
示例14: __auxio_rmw
static void __auxio_rmw(u8 bits_on, u8 bits_off, int ebus)
{
if (auxio_register) {
unsigned long flags;
u8 regval, newval;
spin_lock_irqsave(&auxio_lock, flags);
regval = (ebus ?
(u8) readl(auxio_register) :
sbus_readb(auxio_register));
newval = regval | bits_on;
newval &= ~bits_off;
if (!ebus)
newval &= ~AUXIO_AUX1_MASK;
if (ebus)
writel((u32) newval, auxio_register);
else
sbus_writeb(newval, auxio_register);
spin_unlock_irqrestore(&auxio_lock, flags);
}
}
开发者ID:12rafael，项目名称:jellytimekernel，代码行数:23，代码来源:auxio_64.c
示例15: init_one_port
static int __init init_one_port(struct sbus_dev *sdev)
{
struct parport *p;
/* at least in theory there may be a "we don't dma" case */
struct parport_operations *ops;
void __iomem *base;
int irq, dma, err = 0, size;
struct bpp_regs __iomem *regs;
unsigned char value_tcr;
Node *node;
dprintk((KERN_DEBUG "init_one_port(%p): ranges, alloc_io, ", sdev));
node = kmalloc(sizeof(Node), GFP_KERNEL);
if (!node)
goto out0;
irq = sdev->irqs[0];
base = sbus_ioremap(&sdev->resource[0], 0,
sdev->reg_addrs[0].reg_size,
"sunbpp");
if (!base)
goto out1;
size = sdev->reg_addrs[0].reg_size;
dma = PARPORT_DMA_NONE;
dprintk(("alloc(ppops), "));
ops = kmalloc (sizeof (struct parport_operations), GFP_KERNEL);
if (!ops)
goto out2;
memcpy (ops, &parport_sunbpp_ops, sizeof (struct parport_operations));
dprintk(("register_port\n"));
if (!(p = parport_register_port((unsigned long)base, irq, dma, ops)))
goto out3;
p->size = size;
dprintk((KERN_DEBUG "init_one_port: request_irq(%08x:%p:%x:%s:%p) ",
p->irq, parport_sunbpp_interrupt, SA_SHIRQ, p->name, p));
if ((err = request_irq(p->irq, parport_sunbpp_interrupt,
SA_SHIRQ, p->name, p)) != 0) {
dprintk(("ERROR %d\n", err));
goto out4;
}
dprintk(("OK\n"));
parport_sunbpp_enable_irq(p);
regs = (struct bpp_regs __iomem *)p->base;
dprintk((KERN_DEBUG "forward\n"));
value_tcr = sbus_readb(®s->p_tcr);
value_tcr &= ~P_TCR_DIR;
sbus_writeb(value_tcr, ®s->p_tcr);
printk(KERN_INFO "%s: sunbpp at 0x%lx\n", p->name, p->base);
node->port = p;
list_add(&node->list, &port_list);
parport_announce_port (p);
return 1;
out4:
parport_put_port(p);
out3:
kfree(ops);
out2:
sbus_iounmap(base, size);
out1:
kfree(node);
out0:
return err;
}
开发者ID:OpenHMR，项目名称:Open-HMR600，代码行数:73，代码来源:parport_sunbpp.c
示例16: myri_load_lanai
static int __devinit myri_load_lanai(struct myri_eth *mp)
{
const struct firmware *fw;
struct net_device *dev = mp->dev;
struct myri_shmem __iomem *shmem = mp->shmem;
void __iomem *rptr;
int i, lanai4_data_size;
myri_disable_irq(mp->lregs, mp->cregs);
myri_reset_on(mp->cregs);
rptr = mp->lanai;
for (i = 0; i < mp->eeprom.ramsz; i++)
sbus_writeb(0, rptr + i);
if (mp->eeprom.cpuvers >= CPUVERS_3_0)
sbus_writel(mp->eeprom.cval, mp->lregs + LANAI_CVAL);
i = request_firmware(&fw, FWNAME, &mp->myri_op->dev);
if (i) {
// printk(KERN_ERR "Failed to load image \"%s\" err %d\n",
;
return i;
}
if (fw->size < 2) {
// printk(KERN_ERR "Bogus length %zu in image \"%s\"\n",
;
release_firmware(fw);
return -EINVAL;
}
lanai4_data_size = fw->data[0] << 8 | fw->data[1];
/* Load executable code. */
for (i = 2; i < fw->size; i++)
sbus_writeb(fw->data[i], rptr++);
/* Load data segment. */
for (i = 0; i < lanai4_data_size; i++)
sbus_writeb(0, rptr++);
/* Set device address. */
sbus_writeb(0, &shmem->addr[0]);
sbus_writeb(0, &shmem->addr[1]);
for (i = 0; i < 6; i++)
sbus_writeb(dev->dev_addr[i],
&shmem->addr[i + 2]);
/* Set SBUS bursts and interrupt mask. */
sbus_writel(((mp->myri_bursts & 0xf8) >> 3), &shmem->burst);
sbus_writel(SHMEM_IMASK_RX, &shmem->imask);
/* Release the LANAI. */
myri_disable_irq(mp->lregs, mp->cregs);
myri_reset_off(mp->lregs, mp->cregs);
myri_disable_irq(mp->lregs, mp->cregs);
/* Wait for the reset to complete. */
for (i = 0; i < 5000; i++) {
if (sbus_readl(&shmem->channel.state) != STATE_READY)
break;
else
udelay(10);
}
if (i == 5000)
;
i = myri_do_handshake(mp);
if (i)
;
if (mp->eeprom.cpuvers == CPUVERS_4_0)
sbus_writel(0, mp->lregs + LANAI_VERS);
release_firmware(fw);
return i;
}
开发者ID:nos1609，项目名称:Chrono_Kernel-1，代码行数:77，代码来源:myri_sbus.c
示例17: myri_load_lanai
static int myri_load_lanai(struct myri_eth *mp)
{
struct net_device *dev = mp->dev;
struct myri_shmem *shmem = mp->shmem;
unsigned char *rptr;
int i;
myri_disable_irq(mp->lregs, mp->cregs);
myri_reset_on(mp->cregs);
rptr = (unsigned char *) mp->lanai;
for (i = 0; i < mp->eeprom.ramsz; i++)
sbus_writeb(0, &rptr[i]);
if (mp->eeprom.cpuvers >= CPUVERS_3_0)
sbus_writel(mp->eeprom.cval, mp->lregs + LANAI_CVAL);
/* Load executable code. */
for (i = 0; i < sizeof(lanai4_code); i++)
sbus_writeb(lanai4_code[i], &rptr[(lanai4_code_off * 2) + i]);
/* Load data segment. */
for (i = 0; i < sizeof(lanai4_data); i++)
sbus_writeb(lanai4_data[i], &rptr[(lanai4_data_off * 2) + i]);
/* Set device address. */
sbus_writeb(0, &shmem->addr[0]);
sbus_writeb(0, &shmem->addr[1]);
for (i = 0; i < 6; i++)
sbus_writeb(dev->dev_addr[i],
&shmem->addr[i + 2]);
/* Set SBUS bursts and interrupt mask. */
sbus_writel(((mp->myri_bursts & 0xf8) >> 3), &shmem->burst);
sbus_writel(SHMEM_IMASK_RX, &shmem->imask);
/* Release the LANAI. */
myri_disable_irq(mp->lregs, mp->cregs);
myri_reset_off(mp->lregs, mp->cregs);
myri_disable_irq(mp->lregs, mp->cregs);
/* Wait for the reset to complete. */
for (i = 0; i < 5000; i++) {
if (sbus_readl(&shmem->channel.state) != STATE_READY)
break;
else
udelay(10);
}
if (i == 5000)
printk(KERN_ERR "myricom: Chip would not reset after firmware load.\n");
i = myri_do_handshake(mp);
if (i)
printk(KERN_ERR "myricom: Handshake with LANAI failed.\n");
if (mp->eeprom.cpuvers == CPUVERS_4_0)
sbus_writel(0, mp->lregs + LANAI_VERS);
return i;
}
开发者ID:dmgerman，项目名称:original，代码行数:61，代码来源:myri_sbus.c
示例18: init_one_port
static int __init init_one_port(struct sbus_dev *sdev)
{
struct parport *p;
/* at least in theory there may be a "we don't dma" case */
struct parport_operations *ops;
unsigned long base;
int irq, dma, err, size;
struct bpp_regs *regs;
unsigned char value_tcr;
dprintk((KERN_DEBUG "init_one_port(%p): ranges, alloc_io, ", sdev));
irq = sdev->irqs[0];
base = sbus_ioremap(&sdev->resource[0], 0,
sdev->reg_addrs[0].reg_size,
"sunbpp");
size = sdev->reg_addrs[0].reg_size;
dma = PARPORT_DMA_NONE;
dprintk(("alloc(ppops), "));
ops = kmalloc (sizeof (struct parport_operations), GFP_KERNEL);
if (!ops) {
sbus_iounmap(base, size);
return 0;
}
memcpy (ops, &parport_sunbpp_ops, sizeof (struct parport_operations));
dprintk(("register_port\n"));
if (!(p = parport_register_port(base, irq, dma, ops))) {
kfree(ops);
sbus_iounmap(base, size);
return 0;
}
p->size = size;
dprintk((KERN_DEBUG "init_one_port: request_irq(%08x:%p:%x:%s:%p) ",
p->irq, parport_sunbpp_interrupt, SA_SHIRQ, p->name, p));
if ((err = request_irq(p->irq, parport_sunbpp_interrupt,
SA_SHIRQ, p->name, p)) != 0) {
dprintk(("ERROR %d\n", err));
parport_unregister_port(p);
kfree(ops);
sbus_iounmap(base, size);
return err;
} else {
dprintk(("OK\n"));
parport_sunbpp_enable_irq(p);
}
regs = (struct bpp_regs *)p->base;
dprintk((KERN_DEBUG "forward\n"));
value_tcr = sbus_readb(®s->p_tcr);
value_tcr &= ~P_TCR_DIR;
sbus_writeb(value_tcr, ®s->p_tcr);
printk(KERN_INFO "%s: sunbpp at 0x%lx\n", p->name, p->base);
parport_proc_register(p);
parport_announce_port (p);
return 1;
}
开发者ID:SimonKagstrom，项目名称:mci500h-linux-2.4.27，代码行数:62，代码来源:parport_sunbpp.c
示例19: qe_init
static int qe_init(struct sunqe *qep, int from_irq)
{
struct sunqec *qecp = qep->parent;
void __iomem *cregs = qep->qcregs;
void __iomem *mregs = qep->mregs;
void __iomem *gregs = qecp->gregs;
unsigned char *e = &qep->dev->dev_addr[0];
__u32 qblk_dvma = (__u32)qep->qblock_dvma;
u32 tmp;
int i;
/* Shut it up. */
if (qe_stop(qep))
return -EAGAIN;
/* Setup initial rx/tx init block pointers. */
sbus_writel(qblk_dvma + qib_offset(qe_rxd, 0), cregs + CREG_RXDS);
sbus_writel(qblk_dvma + qib_offset(qe_txd, 0), cregs + CREG_TXDS);
/* Enable/mask the various irq's. */
sbus_writel(0, cregs + CREG_RIMASK);
sbus_writel(1, cregs + CREG_TIMASK);
sbus_writel(0, cregs + CREG_QMASK);
sbus_writel(CREG_MMASK_RXCOLL, cregs + CREG_MMASK);
/* Setup the FIFO pointers into QEC local memory. */
tmp = qep->channel * sbus_readl(gregs + GLOB_MSIZE);
sbus_writel(tmp, cregs + CREG_RXRBUFPTR);
sbus_writel(tmp, cregs + CREG_RXWBUFPTR);
tmp = sbus_readl(cregs + CREG_RXRBUFPTR) +
sbus_readl(gregs + GLOB_RSIZE);
sbus_writel(tmp, cregs + CREG_TXRBUFPTR);
sbus_writel(tmp, cregs + CREG_TXWBUFPTR);
/* Clear the channel collision counter. */
sbus_writel(0, cregs + CREG_CCNT);
/* For 10baseT, inter frame space nor throttle seems to be necessary. */
sbus_writel(0, cregs + CREG_PIPG);
/* Now dork with the AMD MACE. */
sbus_writeb(MREGS_PHYCONFIG_AUTO, mregs + MREGS_PHYCONFIG);
sbus_writeb(MREGS_TXFCNTL_AUTOPAD, mregs + MREGS_TXFCNTL);
sbus_writeb(0, mregs + MREGS_RXFCNTL);
/* The QEC dma's the rx'd packets from local memory out to main memory,
* and therefore it interrupts when the packet reception is "complete".
* So don't listen for the MACE talking about it.
*/
sbus_writeb(MREGS_IMASK_COLL | MREGS_IMASK_RXIRQ, mregs + MREGS_IMASK);
sbus_writeb(MREGS_BCONFIG_BSWAP | MREGS_BCONFIG_64TS, mregs + MREGS_BCONFIG);
sbus_writeb((MREGS_FCONFIG_TXF16 | MREGS_FCONFIG_RXF32 |
MREGS_FCONFIG_RFWU | MREGS_FCONFIG_TFWU),
mregs + MREGS_FCONFIG);
/* Only usable interface on QuadEther is twisted pair. */
sbus_writeb(MREGS_PLSCONFIG_TP, mregs + MREGS_PLSCONFIG);
/* Tell MACE we are changing the ether address. */
sbus_writeb(MREGS_IACONFIG_ACHNGE | MREGS_IACONFIG_PARESET,
mregs + MREGS_IACONFIG);
while ((sbus_readb(mregs + MREGS_IACONFIG) & MREGS_IACONFIG_ACHNGE) != 0)
barrier();
sbus_writeb(e[0], mregs + MREGS_ETHADDR);
sbus_writeb(e[1], mregs + MREGS_ETHADDR);
sbus_writeb(e[2], mregs + MREGS_ETHADDR);
sbus_writeb(e[3], mregs + MREGS_ETHADDR);
sbus_writeb(e[4], mregs + MREGS_ETHADDR);
sbus_writeb(e[5], mregs + MREGS_ETHADDR);
/* Clear out the address filter. */
sbus_writeb(MREGS_IACONFIG_ACHNGE | MREGS_IACONFIG_LARESET,
mregs + MREGS_IACONFIG);
while ((sbus_readb(mregs + MREGS_IACONFIG) & MREGS_IACONFIG_ACHNGE) != 0)
barrier();
for (i = 0; i < 8; i++)
sbus_writeb(0, mregs + MREGS_FILTER);
/* Address changes are now complete. */
sbus_writeb(0, mregs + MREGS_IACONFIG);
qe_init_rings(qep);
/* Wait a little bit for the link to come up... */
mdelay(5);
if (!(sbus_readb(mregs + MREGS_PHYCONFIG) & MREGS_PHYCONFIG_LTESTDIS)) {
int tries = 50;
while (--tries) {
u8 tmp;
mdelay(5);
barrier();
tmp = sbus_readb(mregs + MREGS_PHYCONFIG);
if ((tmp & MREGS_PHYCONFIG_LSTAT) != 0)
break;
}
if (tries == 0)
//.........这里部分代码省略.........
开发者ID:Lyude，项目名称:linux，代码行数:101，代码来源:sunqe.c
示例20: sbus_esp_write8
static void sbus_esp_write8(struct esp *esp, u8 val, unsigned long reg)
{
sbus_writeb(val, esp->regs + (reg * 4UL));
}
开发者ID:0xroot，项目名称:Blackphone-BP1-Kernel，代码行数:4，代码来源:sun_esp.c
注：本文中的sbus_writeb函数示例由纯净天空整理自Github/MSDocs等源码及文档管理平台，相关代码片段筛选自各路编程大神贡献的开源项目，源码版权归原作者所有，传播和使用请参考对应项目的License；未经允许，请勿转载。 |
客服电话
APP下载
官方微信
请发表评论