本文整理汇总了C++中setup_sched_clock函数的典型用法代码示例。如果您正苦于以下问题:C++ setup_sched_clock函数的具体用法?C++ setup_sched_clock怎么用?C++ setup_sched_clock使用的例子?那么恭喜您, 这里精选的函数代码示例或许可以为您提供帮助。
在下文中一共展示了setup_sched_clock函数的20个代码示例,这些例子默认根据受欢迎程度排序。您可以为喜欢或者感觉有用的代码点赞,您的评价将有助于我们的系统推荐出更棒的C++代码示例。
示例1: shmac_clocksource_init
static void __init shmac_clocksource_init(struct device_node *node)
{
void __iomem *base;
u32 freq;
base = of_iomap(node, 0);
source_base = (u32) base;
if (!base)
panic("Can't remap registers");
if (of_property_read_u32(node, "clock-frequency", &freq))
panic("Can't read clock-frequency");
SHMAC_TIMER_CLEAR(base);
SHMAC_TIMER_START(base);
setup_sched_clock(shmac_sched_clock_read, 32, freq/1024);
/* Schedule a clock read from system tick counter instead of using the
timer value as a clocksource.
if(clocksource_mmio_init(base + TIMER_VALUE, "SHMAC clocksource",
freq, 200, 24, shmac_clocksource_mmio_readl_down))
panic("Can't register clocksource\n");
*/
pr_info("SHMAC clocksource init done\n");
}
开发者ID:HEATHlabs,项目名称:ravlinux,代码行数:28,代码来源:shmac_timer.c
示例2: omap2_gptimer_clocksource_init
static void __init omap2_gptimer_clocksource_init(int gptimer_id,
const char *fck_source,
const char *property)
{
int res;
clksrc.id = gptimer_id;
clksrc.errata = omap_dm_timer_get_errata();
res = omap_dm_timer_init_one(&clksrc, fck_source, property,
&clocksource_gpt.name,
OMAP_TIMER_NONPOSTED);
BUG_ON(res);
__omap_dm_timer_load_start(&clksrc,
OMAP_TIMER_CTRL_ST | OMAP_TIMER_CTRL_AR, 0,
OMAP_TIMER_NONPOSTED);
setup_sched_clock(dmtimer_read_sched_clock, 32, clksrc.rate);
if (clocksource_register_hz(&clocksource_gpt, clksrc.rate))
pr_err("Could not register clocksource %s\n",
clocksource_gpt.name);
else
pr_info("OMAP clocksource: %s at %lu Hz\n",
clocksource_gpt.name, clksrc.rate);
}
开发者ID:bjayesh,项目名称:chandra,代码行数:26,代码来源:timer.c
示例3: ixp4xx_clocksource_init
static void __init ixp4xx_clocksource_init(void)
{
setup_sched_clock(ixp4xx_read_sched_clock, 32, ixp4xx_timer_freq);
clocksource_mmio_init(NULL, "OSTS", ixp4xx_timer_freq, 200, 32,
ixp4xx_clocksource_read);
}
开发者ID:8563,项目名称:millennium-sources,代码行数:7,代码来源:common.c
示例4: orion_time_init
void __init orion_time_init(unsigned int irq, unsigned int tclk)
{
u32 u;
ticks_per_jiffy = (tclk + HZ/2) / HZ;
/*
* Set scale and timer for sched_clock
*/
setup_sched_clock(tclk);
/*
* Setup free-running clocksource timer (interrupts
* disabled.)
*/
writel(0xffffffff, TIMER0_VAL);
writel(0xffffffff, TIMER0_RELOAD);
u = readl(BRIDGE_MASK);
writel(u & ~BRIDGE_INT_TIMER0, BRIDGE_MASK);
u = readl(TIMER_CTRL);
writel(u | TIMER0_EN | TIMER0_RELOAD_EN, TIMER_CTRL);
orion_clksrc.mult = clocksource_hz2mult(tclk, orion_clksrc.shift);
clocksource_register(&orion_clksrc);
/*
* Setup clockevent timer (interrupt-driven.)
*/
setup_irq(irq, &orion_timer_irq);
orion_clkevt.mult = div_sc(tclk, NSEC_PER_SEC, orion_clkevt.shift);
orion_clkevt.max_delta_ns = clockevent_delta2ns(0xfffffffe, &orion_clkevt);
orion_clkevt.min_delta_ns = clockevent_delta2ns(1, &orion_clkevt);
orion_clkevt.cpumask = cpumask_of(0);
clockevents_register_device(&orion_clkevt);
}
开发者ID:cruisesha,项目名称:linux-2.6.32.9,代码行数:34,代码来源:time.c
示例5: aw_clksrc_init
void __init aw_clksrc_init(void)
{
pr_info("%s(%d)\n", __func__, __LINE__);
#if 0 /* start counting on booting, so cannot clear it, otherwise systime will be err */
/* we use 64bits counter as HPET(High Precision Event Timer) */
writel(0, SW_HSTMR_CTRL_REG);
/* config clock source for 64bits counter */
temp = readl(SW_HSTMR_CTRL_REG);
temp &= ~(1<<2);
/* clear 64bits counter */
temp |= (1<<0);
writel(temp, SW_HSTMR_CTRL_REG);
/* wait clear complete */
while(cnt-- && (readl(SW_HSTMR_CTRL_REG) & (1<<0)));
if(unlikely(0 == cnt))
pr_err("%s(%d): wait cleared timeout\n", __func__, __LINE__);
#endif
/* calculate the mult by shift */
aw_clocksrc.mult = clocksource_hz2mult(AW_HPET_CLOCK_SOURCE_HZ, aw_clocksrc.shift);
/* register clock source */
clocksource_register(&aw_clocksrc);
/* set sched clock */
setup_sched_clock(sched_clock_read, 32, AW_HPET_CLOCK_SOURCE_HZ);
pr_info("%s(%d)\n", __func__, __LINE__);
}
开发者ID:ashwing920,项目名称:PhoenixA20_linux_sourcecode,代码行数:28,代码来源:timer.c
示例6: sched_clock_postinit
void __init sched_clock_postinit(void)
{
if (read_sched_clock == jiffy_sched_clock_read)
setup_sched_clock(jiffy_sched_clock_read, 32, HZ);
sched_clock_poll(sched_clock_timer.data);
}
开发者ID:AKToronto,项目名称:IronBorn2,代码行数:7,代码来源:sched_clock.c
示例7: apb_timer_init
void __init apb_timer_init(void)
{
int cpu;
tmr_group0_config();
tmr_group1_config();
tmr_group2_config();
setup_sched_clock(mmp_read_sched_clock, 32, CLOCK_TICK_RATE_32KHZ);
clockevents_calc_mult_shift(&ckevt, CLOCK_TICK_RATE_32KHZ, 4);
ckevt.max_delta_ns = clockevent_delta2ns(MAX_DELTA, &ckevt);
ckevt.min_delta_ns = clockevent_delta2ns(MIN_DELTA, &ckevt);
ckevt.cpumask = cpumask_of(0);
ckevt.irq = IRQ_PXA1088_AP3_TIMER1;
setup_irq(ckevt.irq, &timer_irq);
clocksource_register_hz(&cksrc, CLOCK_TICK_RATE_32KHZ);
clockevents_register_device(&ckevt);
for (cpu = 0; cpu < num_possible_cpus(); cpu++) {
setup_irq(irq_map[cpu].irq, &irq_map[cpu].irq_act);
disable_irq(irq_map[cpu].irq);
}
local_timer_register(&mmp_percpu_timer_ops);
}
开发者ID:C457,项目名称:android_kernel_samsung_t110,代码行数:26,代码来源:time-apb.c
示例8: clksrc_dbx500_prcmu_init
void __init clksrc_dbx500_prcmu_init(void __iomem *base)
{
clksrc_dbx500_timer_base = base;
/*
* The A9 sub system expects the timer to be configured as
* a continous looping timer.
* The PRCMU should configure it but if it for some reason
* don't we do it here.
*/
if (readl(clksrc_dbx500_timer_base + PRCMU_TIMER_MODE) !=
TIMER_MODE_CONTINOUS) {
writel(TIMER_MODE_CONTINOUS,
clksrc_dbx500_timer_base + PRCMU_TIMER_MODE);
writel(TIMER_DOWNCOUNT_VAL,
clksrc_dbx500_timer_base + PRCMU_TIMER_REF);
}
#ifdef CONFIG_CLKSRC_DBX500_PRCMU_SCHED_CLOCK
setup_sched_clock(dbx500_prcmu_sched_clock_read,
32, RATE_32K);
#endif
clocksource_calc_mult_shift(&clocksource_dbx500_prcmu,
RATE_32K, SCHED_CLOCK_MIN_WRAP);
clocksource_register(&clocksource_dbx500_prcmu);
boottime_activate(&boottime_timer);
}
开发者ID:Epirex,项目名称:Chrono_Kernel-1,代码行数:27,代码来源:clksrc-dbx500-prcmu.c
示例9: nmdk_timer_init
void __init nmdk_timer_init(void __iomem *base, int irq)
{
unsigned long rate;
struct clk *clk0, *pclk0;
mtu_base = base;
pclk0 = clk_get_sys("mtu0", "apb_pclk");
BUG_ON(IS_ERR(pclk0));
BUG_ON(clk_prepare(pclk0) < 0);
BUG_ON(clk_enable(pclk0) < 0);
clk0 = clk_get_sys("mtu0", NULL);
BUG_ON(IS_ERR(clk0));
BUG_ON(clk_prepare(clk0) < 0);
BUG_ON(clk_enable(clk0) < 0);
/*
* Tick rate is 2.4MHz for Nomadik and 2.4Mhz, 100MHz or 133 MHz
* for ux500.
* Use a divide-by-16 counter if the tick rate is more than 32MHz.
* At 32 MHz, the timer (with 32 bit counter) can be programmed
* to wake-up at a max 127s a head in time. Dividing a 2.4 MHz timer
* with 16 gives too low timer resolution.
*/
rate = clk_get_rate(clk0);
if (rate > 32000000) {
rate /= 16;
clk_prescale = MTU_CRn_PRESCALE_16;
} else {
clk_prescale = MTU_CRn_PRESCALE_1;
}
/* Cycles for periodic mode */
nmdk_cycle = DIV_ROUND_CLOSEST(rate, HZ);
/* Timer 0 is the free running clocksource */
nmdk_clksrc_reset();
if (clocksource_mmio_init(mtu_base + MTU_VAL(0), "mtu_0",
rate, 200, 32, clocksource_mmio_readl_down))
pr_err("timer: failed to initialize clock source %s\n",
"mtu_0");
#ifdef CONFIG_NOMADIK_MTU_SCHED_CLOCK
setup_sched_clock(nomadik_read_sched_clock, 32, rate);
#endif
/* Timer 1 is used for events, register irq and clockevents */
setup_irq(irq, &nmdk_timer_irq);
nmdk_clkevt.cpumask = cpumask_of(0);
nmdk_clkevt.irq = irq;
clockevents_config_and_register(&nmdk_clkevt, rate, 2, 0xffffffffU);
mtu_delay_timer.read_current_timer = &nmdk_timer_read_current_timer;
mtu_delay_timer.freq = rate;
register_current_timer_delay(&mtu_delay_timer);
}
开发者ID:AiWinters,项目名称:linux,代码行数:59,代码来源:nomadik-mtu.c
示例10: arch_timer_sched_clock_init
int __init arch_timer_sched_clock_init(void)
{
if (arch_timer_get_rate() == 0)
return -ENXIO;
setup_sched_clock(arch_timer_read_counter_u32,
32, arch_timer_get_rate());
return 0;
}
开发者ID:8563,项目名称:millennium-sources,代码行数:9,代码来源:arch_timer.c
示例11: sched_clock_postinit
void __init sched_clock_postinit(void)
{
/*
* If no sched_clock function has been provided at that point,
* make it the final one one.
*/
if (read_sched_clock == jiffy_sched_clock_read)
setup_sched_clock(jiffy_sched_clock_read, 32, HZ);
sched_clock_poll(sched_clock_timer.data);
}
开发者ID:davidmueller13,项目名称:valexKernel-lt03wifi,代码行数:11,代码来源:sched_clock.c
示例12: mxc_clocksource_init
static int __init mxc_clocksource_init(struct clk *timer_clk)
{
unsigned int c = clk_get_rate(timer_clk);
void __iomem *reg = timer_base + (timer_is_v2() ? V2_TCN : MX1_2_TCN);
sched_clock_reg = reg;
setup_sched_clock(mxc_read_sched_clock, 32, c);
return clocksource_mmio_init(reg, "mxc_timer1", c, 200, 32,
clocksource_mmio_readl_up);
}
开发者ID:0xroot,项目名称:Blackphone-BP1-Kernel,代码行数:11,代码来源:time.c
示例13: ns115_clocksource_init
static void __init ns115_clocksource_init(void)
{
/* setup timer 0 as free-running clocksource */
writel(0, _timer3_va_base + TIMERX_CTRL);
writel(0xffffffff, _timer3_va_base + TIMERX_LOAD);
writel(3, _timer3_va_base + TIMERX_CTRL);
setup_sched_clock(ns115_get_cycles, 32, TIMER_CLK_RATE);
clocksource_register_hz(&clocksource_ns115, TIMER_CLK_RATE);
clocksource_register_hz(&clocksource_ns115_n, TIMER_CLK_RATE_N);
}
开发者ID:alessandroste,项目名称:testBSP,代码行数:12,代码来源:timer-dw.c
示例14: omap_init_clocksource_32k
int __init omap_init_clocksource_32k(void)
{
static char err[] __initdata = KERN_ERR
"%s: can't register clocksource!\n";
if (cpu_is_omap16xx() || cpu_class_is_omap2()) {
u32 pbase;
unsigned long size = SZ_4K;
void __iomem *base;
struct clk *sync_32k_ick;
if (cpu_is_omap16xx()) {
pbase = OMAP16XX_TIMER_32K_SYNCHRONIZED;
size = SZ_1K;
} else if (cpu_is_omap2420())
pbase = OMAP2420_32KSYNCT_BASE + 0x10;
else if (cpu_is_omap2430())
pbase = OMAP2430_32KSYNCT_BASE + 0x10;
else if (cpu_is_omap34xx())
pbase = OMAP3430_32KSYNCT_BASE + 0x10;
else if (cpu_is_omap44xx())
pbase = OMAP4430_32KSYNCT_BASE + 0x10;
else if (cpu_is_omap54xx())
pbase = OMAP54XX_32KSYNCT_BASE + 0x30;
else
return -ENODEV;
/* For this to work we must have a static mapping in io.c for this area */
base = ioremap(pbase, size);
if (!base)
return -ENODEV;
sync_32k_ick = clk_get(NULL, "omap_32ksync_ick");
if (!IS_ERR(sync_32k_ick))
clk_enable(sync_32k_ick);
timer_32k_base = base;
/*
* 120000 rough estimate from the calculations in
* __clocksource_updatefreq_scale.
*/
clocks_calc_mult_shift(&persistent_mult, &persistent_shift,
32768, NSEC_PER_SEC, 120000);
if (clocksource_mmio_init(base, "32k_counter", 32768, 250, 32,
clocksource_mmio_readl_up))
printk(err, "32k_counter");
setup_sched_clock(omap_32k_read_sched_clock, 32, 32768);
}
return 0;
}
开发者ID:SciAps,项目名称:android-kernel,代码行数:53,代码来源:counter_32k.c
示例15: ttc_setup_clocksource
static void __init ttc_setup_clocksource(struct clk *clk, void __iomem *base)
{
struct ttc_timer_clocksource *ttccs;
int err;
ttccs = kzalloc(sizeof(*ttccs), GFP_KERNEL);
if (WARN_ON(!ttccs))
return;
ttccs->ttc.clk = clk;
err = clk_prepare_enable(ttccs->ttc.clk);
if (WARN_ON(err)) {
kfree(ttccs);
return;
}
ttccs->ttc.clk_rate_change_nb.notifier_call =
ttc_rate_change_clocksource_cb;
ttccs->ttc.clk_rate_change_nb.next = NULL;
if (clk_notifier_register(ttccs->ttc.clk,
&ttccs->ttc.clk_rate_change_nb))
pr_warn("Unable to register clock notifier.\n");
ttccs->ttc.base_addr = base;
ttccs->cs.name = "ttc_clocksource";
ttccs->cs.rating = 200;
ttccs->cs.read = __ttc_clocksource_read;
ttccs->cs.mask = CLOCKSOURCE_MASK(16);
ttccs->cs.flags = CLOCK_SOURCE_IS_CONTINUOUS;
/*
* Setup the clock source counter to be an incrementing counter
* with no interrupt and it rolls over at 0xFFFF. Pre-scale
* it by 32 also. Let it start running now.
*/
__raw_writel(0x0, ttccs->ttc.base_addr + TTC_IER_OFFSET);
__raw_writel(CLK_CNTRL_PRESCALE | CLK_CNTRL_PRESCALE_EN,
ttccs->ttc.base_addr + TTC_CLK_CNTRL_OFFSET);
__raw_writel(CNT_CNTRL_RESET,
ttccs->ttc.base_addr + TTC_CNT_CNTRL_OFFSET);
err = clocksource_register_hz(&ttccs->cs,
clk_get_rate(ttccs->ttc.clk) / PRESCALE);
if (WARN_ON(err)) {
kfree(ttccs);
return;
}
ttc_sched_clock_val_reg = base + TTC_COUNT_VAL_OFFSET;
setup_sched_clock(ttc_sched_clock_read, 16,
clk_get_rate(ttccs->ttc.clk) / PRESCALE);
}
开发者ID:03199618,项目名称:linux,代码行数:53,代码来源:cadence_ttc_timer.c
示例16: setup_clksrc
static inline void setup_clksrc(void)
{
struct clocksource *cs = &mt6589_gpt.clocksource;
struct gpt_device *dev = id_to_dev(GPT_CLKSRC_ID);
cs->mult = clocksource_hz2mult(SYS_CLK_RATE, cs->shift);
setup_gpt_dev_locked(dev, GPT_FREE_RUN, GPT_CLK_SRC_SYS, GPT_CLK_DIV_1,
0, NULL, 0);
setup_sched_clock((void *)mt_read_sched_clock, 32, SYS_CLK_RATE);
}
开发者ID:johnnyslt,项目名称:fxos-for-v967s,代码行数:12,代码来源:mt_gpt.c
示例17: nmdk_timer_init
void __init nmdk_timer_init(void)
{
unsigned long rate;
struct clk *clk0;
int ret;
clk0 = clk_get_sys("mtu0", NULL);
BUG_ON(IS_ERR(clk0));
ret = clk_prepare_enable(clk0);
BUG_ON(ret != 0);
/*
* Tick rate is 2.4MHz for Nomadik and 2.4Mhz, 100MHz or 133 MHz
* for ux500.
* Use a divide-by-16 counter if the tick rate is more than 32MHz.
* At 32 MHz, the timer (with 32 bit counter) can be programmed
* to wake-up at a max 127s a head in time. Dividing a 2.4 MHz timer
* with 16 gives too low timer resolution.
*/
rate = clk_get_rate(clk0);
if (rate > 32000000) {
rate /= 16;
clk_prescale = MTU_CRn_PRESCALE_16;
} else {
clk_prescale = MTU_CRn_PRESCALE_1;
}
nmdk_cycle = (rate + HZ/2) / HZ;
/* Timer 0 is the free running clocksource */
nmdk_clksrc_reset();
if (clocksource_mmio_init(mtu_base + MTU_VAL(0), "mtu_0",
rate, 200, 32, clocksource_mmio_readl_down))
pr_err("timer: failed to initialize clock source %s\n",
"mtu_0");
#ifdef CONFIG_NOMADIK_MTU_SCHED_CLOCK
setup_sched_clock(nomadik_read_sched_clock, 32, rate);
#endif
/* Timer 1 is used for events, register irq and clockevents */
setup_irq(IRQ_MTU0, &nmdk_timer_irq);
nmdk_clkevt.cpumask = cpumask_of(0);
clockevents_config_and_register(&nmdk_clkevt, rate, 2, 0xffffffffU);
#ifdef ARCH_HAS_READ_CURRENT_TIMER
set_delay_fn(nmdk_timer_delay_loop);
#endif
}
开发者ID:Abhinav1997,项目名称:android_kernel_riogrande,代码行数:52,代码来源:timer.c
示例18: mtu_timer_init
void __init mtu_timer_init(void)
{
unsigned long rate;
struct clk *clk0;
clk0 = clk_get_sys("mtu0", NULL);
BUG_ON(IS_ERR(clk0));
rate = clk_get_rate(clk0);
clk_enable(clk0);
/*
* Set scale and timer for sched_clock
*/
setup_sched_clock(rate);
u8500_cycle = (rate + HZ/2) / HZ;
/* Save global pointer to mtu, used by functions above */
if (cpu_is_u5500()) {
mtu0_base = ioremap(U5500_MTU0_BASE, SZ_4K);
} else if (cpu_is_u8500()) {
mtu0_base = ioremap(U8500_MTU0_BASE, SZ_4K);
} else {
ux500_unknown_soc();
}
/* Restart clock source */
mtu_clocksource_reset();
/* Now the scheduling clock is ready */
u8500_clksrc.read = u8500_read_timer;
u8500_clksrc.mult = clocksource_hz2mult(rate, u8500_clksrc.shift);
clocksource_register(&u8500_clksrc);
/* Register irq and clockevents */
/* We can sleep for max 10s (actually max is longer) */
clockevents_calc_mult_shift(&u8500_mtu_clkevt, rate, 10);
u8500_mtu_clkevt.max_delta_ns = clockevent_delta2ns(0xffffffff,
&u8500_mtu_clkevt);
u8500_mtu_clkevt.min_delta_ns = clockevent_delta2ns(0xff,
&u8500_mtu_clkevt);
setup_irq(IRQ_MTU0, &u8500_timer_irq);
clockevents_register_device(&u8500_mtu_clkevt);
#ifdef ARCH_HAS_READ_CURRENT_TIMER
set_delay_fn(mtu_timer_delay_loop);
#endif
}
开发者ID:CallMeVentus,项目名称:i9070_kernel_CoCore-P,代码行数:52,代码来源:timer-mtu.c
示例19: omap_init_clocksource
static void __init omap_init_clocksource(unsigned long rate)
{
omap_mpu_timer_regs_t __iomem *timer = omap_mpu_timer_base(1);
static char err[] __initdata = KERN_ERR
"%s: can't register clocksource!\n";
omap_mpu_timer_start(1, ~0, 1);
setup_sched_clock(omap_mpu_read_sched_clock, 32, rate);
if (clocksource_mmio_init(&timer->read_tim, "mpu_timer2", rate,
300, 32, clocksource_mmio_readl_down))
printk(err, "mpu_timer2");
}
开发者ID:0x000000FF,项目名称:Linux4Edison,代码行数:13,代码来源:time.c
示例20: gt_clocksource_init
static void __init gt_clocksource_init(void)
{
writel(0, gt_base + GT_CONTROL);
writel(0, gt_base + GT_COUNTER0);
writel(0, gt_base + GT_COUNTER1);
/* enables timer on all the cores */
writel(GT_CONTROL_TIMER_ENABLE, gt_base + GT_CONTROL);
#ifdef CONFIG_CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK
setup_sched_clock(gt_sched_clock_read, 32, gt_clk_rate);
#endif
clocksource_register_hz(>_clocksource, gt_clk_rate);
}
开发者ID:llxwj,项目名称:r7oss,代码行数:13,代码来源:arm_global_timer.c
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