/// addPassesToX helper drives creation and initialization of TargetPassConfig.
static MCContext *
addPassesToGenerateCode(LLVMTargetMachine *TM, PassManagerBase &PM,
                        bool DisableVerify, AnalysisID StartBefore,
                        AnalysisID StartAfter, AnalysisID StopAfter,
                        MachineFunctionInitializer *MFInitializer = nullptr) {

    // Add internal analysis passes from the target machine.
    PM.add(createTargetTransformInfoWrapperPass(TM->getTargetIRAnalysis()));

    // Targets may override createPassConfig to provide a target-specific
    // subclass.
    TargetPassConfig *PassConfig = TM->createPassConfig(PM);
    PassConfig->setStartStopPasses(StartBefore, StartAfter, StopAfter);

    // Set PassConfig options provided by TargetMachine.
    PassConfig->setDisableVerify(DisableVerify);

    PM.add(PassConfig);

    PassConfig->addIRPasses();

    PassConfig->addCodeGenPrepare();

    PassConfig->addPassesToHandleExceptions();

    PassConfig->addISelPrepare();

    // Install a MachineModuleInfo class, which is an immutable pass that holds
    // all the per-module stuff we're generating, including MCContext.
    MachineModuleInfo *MMI = new MachineModuleInfo(
        *TM->getMCAsmInfo(), *TM->getMCRegisterInfo(), TM->getObjFileLowering());
    PM.add(MMI);

    // Set up a MachineFunction for the rest of CodeGen to work on.
    PM.add(new MachineFunctionAnalysis(*TM, MFInitializer));

    // Enable FastISel with -fast, but allow that to be overridden.
    TM->setO0WantsFastISel(EnableFastISelOption != cl::BOU_FALSE);
    if (EnableFastISelOption == cl::BOU_TRUE ||
            (TM->getOptLevel() == CodeGenOpt::None &&
             TM->getO0WantsFastISel()))
        TM->setFastISel(true);

    // Ask the target for an isel.
    if (PassConfig->addInstSelector())
        return nullptr;

    PassConfig->addMachinePasses();

    PassConfig->setInitialized();

    return &MMI->getContext();
}

void llvm::reportGISelFailure(MachineFunction &MF, const TargetPassConfig &TPC,
                              MachineOptimizationRemarkEmitter &MORE,
                              MachineOptimizationRemarkMissed &R) {
  MF.getProperties().set(MachineFunctionProperties::Property::FailedISel);

  // Print the function name explicitly if we don't have a debug location (which
  // makes the diagnostic less useful) or if we're going to emit a raw error.
  if (!R.getLocation().isValid() || TPC.isGlobalISelAbortEnabled())
    R << (" (in function: " + MF.getName() + ")").str();

  if (TPC.isGlobalISelAbortEnabled())
    report_fatal_error(R.getMsg());
  else
    MORE.emit(R);
}

/// addPassesToX helper drives creation and initialization of TargetPassConfig.
static MCContext *addPassesToGenerateCode(LLVMTargetMachine *TM,
                                          PassManagerBase &PM,
                                          bool DisableVerify,
                                          AnalysisID StartAfter,
                                          AnalysisID StopAfter) {
  // Targets may override createPassConfig to provide a target-specific sublass.
  TargetPassConfig *PassConfig = TM->createPassConfig(PM);
  PassConfig->setStartStopPasses(StartAfter, StopAfter);

  // Set PassConfig options provided by TargetMachine.
  PassConfig->setDisableVerify(DisableVerify);

  PM.add(PassConfig);

  PassConfig->addIRPasses();

  PassConfig->addPassesToHandleExceptions();

  PassConfig->addISelPrepare();

  // Install a MachineModuleInfo class, which is an immutable pass that holds
  // all the per-module stuff we're generating, including MCContext.
  MachineModuleInfo *MMI =
    new MachineModuleInfo(*TM->getMCAsmInfo(), *TM->getRegisterInfo(),
                          &TM->getTargetLowering()->getObjFileLowering());
  PM.add(MMI);
  MCContext *Context = &MMI->getContext(); // Return the MCContext by-ref.

  // Set up a MachineFunction for the rest of CodeGen to work on.
  PM.add(new MachineFunctionAnalysis(*TM));

  // Enable FastISel with -fast, but allow that to be overridden.
  if (EnableFastISelOption == cl::BOU_TRUE ||
      (TM->getOptLevel() == CodeGenOpt::None &&
       EnableFastISelOption != cl::BOU_FALSE))
    TM->setFastISel(true);

  // Ask the target for an isel.
  if (PassConfig->addInstSelector())
    return NULL;

  PassConfig->addMachinePasses();

  PassConfig->setInitialized();

  return Context;
}

void llvm::reportGISelFailure(MachineFunction &MF, const TargetPassConfig &TPC,
                              MachineOptimizationRemarkEmitter &MORE,
                              const char *PassName, StringRef Msg,
                              const MachineInstr &MI) {
  MachineOptimizationRemarkMissed R(PassName, "GISelFailure: ",
                                    MI.getDebugLoc(), MI.getParent());
  R << Msg;
  // Printing MI is expensive;  only do it if expensive remarks are enabled.
  if (TPC.isGlobalISelAbortEnabled() || MORE.allowExtraAnalysis(PassName))
    R << ": " << ore::MNV("Inst", MI);
  reportGISelFailure(MF, TPC, MORE, R);
}

/// addPassesToX helper drives creation and initialization of TargetPassConfig.
static MCContext *
addPassesToGenerateCode(LLVMTargetMachine *TM, PassManagerBase &PM,
                        bool DisableVerify, bool &WillCompleteCodeGenPipeline,
                        raw_pwrite_stream &Out, MachineModuleInfo *MMI) {
  // Targets may override createPassConfig to provide a target-specific
  // subclass.
  TargetPassConfig *PassConfig = TM->createPassConfig(PM);
  // Set PassConfig options provided by TargetMachine.
  PassConfig->setDisableVerify(DisableVerify);
  WillCompleteCodeGenPipeline = PassConfig->willCompleteCodeGenPipeline();
  PM.add(PassConfig);
  if (!MMI)
    MMI = new MachineModuleInfo(TM);
  PM.add(MMI);

  if (PassConfig->addISelPasses())
    return nullptr;
  PassConfig->addMachinePasses();
  PassConfig->setInitialized();
  if (!WillCompleteCodeGenPipeline)
    PM.add(createPrintMIRPass(Out));

  return &MMI->getContext();
}

/// addPassesToX helper drives creation and initialization of TargetPassConfig.
static MCContext *
addPassesToGenerateCode(LLVMTargetMachine *TM, PassManagerBase &PM,
                        bool DisableVerify, AnalysisID StartBefore,
                        AnalysisID StartAfter, AnalysisID StopBefore,
                        AnalysisID StopAfter,
                        MachineFunctionInitializer *MFInitializer = nullptr) {

  // When in emulated TLS mode, add the LowerEmuTLS pass.
  if (TM->Options.EmulatedTLS)
    PM.add(createLowerEmuTLSPass(TM));

  PM.add(createPreISelIntrinsicLoweringPass());

  // Add internal analysis passes from the target machine.
  PM.add(createTargetTransformInfoWrapperPass(TM->getTargetIRAnalysis()));

  // Targets may override createPassConfig to provide a target-specific
  // subclass.
  TargetPassConfig *PassConfig = TM->createPassConfig(PM);
  PassConfig->setStartStopPasses(StartBefore, StartAfter, StopBefore,
                                 StopAfter);

  // Set PassConfig options provided by TargetMachine.
  PassConfig->setDisableVerify(DisableVerify);

  PM.add(PassConfig);

  PassConfig->addIRPasses();

  PassConfig->addCodeGenPrepare();

  PassConfig->addPassesToHandleExceptions();

  PassConfig->addISelPrepare();

  MachineModuleInfo *MMI = new MachineModuleInfo(TM);
  MMI->setMachineFunctionInitializer(MFInitializer);
  PM.add(MMI);

  // Enable FastISel with -fast, but allow that to be overridden.
  TM->setO0WantsFastISel(EnableFastISelOption != cl::BOU_FALSE);
  if (EnableFastISelOption == cl::BOU_TRUE ||
      (TM->getOptLevel() == CodeGenOpt::None &&
       TM->getO0WantsFastISel()))
    TM->setFastISel(true);

  // Ask the target for an isel.
  if (LLVM_UNLIKELY(EnableGlobalISel)) {
    if (PassConfig->addIRTranslator())
      return nullptr;

    PassConfig->addPreLegalizeMachineIR();

    if (PassConfig->addLegalizeMachineIR())
      return nullptr;

    // Before running the register bank selector, ask the target if it
    // wants to run some passes.
    PassConfig->addPreRegBankSelect();

    if (PassConfig->addRegBankSelect())
      return nullptr;

    PassConfig->addPreGlobalInstructionSelect();

    if (PassConfig->addGlobalInstructionSelect())
      return nullptr;

    // Pass to reset the MachineFunction if the ISel failed.
    PM.add(createResetMachineFunctionPass(
        PassConfig->reportDiagnosticWhenGlobalISelFallback()));

    // Provide a fallback path when we do not want to abort on
    // not-yet-supported input.
    if (LLVM_UNLIKELY(!PassConfig->isGlobalISelAbortEnabled()) &&
        PassConfig->addInstSelector())
      return nullptr;

  } else if (PassConfig->addInstSelector())
    return nullptr;

  PassConfig->addMachinePasses();

  PassConfig->setInitialized();

  return &MMI->getContext();
}

//.........这里部分代码省略.........
      FileType != TargetMachine::CGFT_ObjectFile)
    errs() << argv[0]
             << ": warning: ignoring -mc-relax-all because filetype != obj";

  {
    raw_pwrite_stream *OS = &Out->os();

    // Manually do the buffering rather than using buffer_ostream,
    // so we can memcmp the contents in CompileTwice mode
    SmallVector<char, 0> Buffer;
    std::unique_ptr<raw_svector_ostream> BOS;
    if ((FileType != TargetMachine::CGFT_AssemblyFile &&
         !Out->os().supportsSeeking()) ||
        CompileTwice) {
      BOS = make_unique<raw_svector_ostream>(Buffer);
      OS = BOS.get();
    }

    AnalysisID StartBeforeID = nullptr;
    AnalysisID StartAfterID = nullptr;
    AnalysisID StopAfterID = nullptr;
    const PassRegistry *PR = PassRegistry::getPassRegistry();
    if (!RunPassNames->empty()) {
      if (!StartAfter.empty() || !StopAfter.empty()) {
        errs() << argv[0] << ": start-after and/or stop-after passes are "
                             "redundant when run-pass is specified.\n";
        return 1;
      }
      if (!MIR) {
        errs() << argv[0] << ": run-pass needs a .mir input.\n";
        return 1;
      }
      LLVMTargetMachine &LLVMTM = static_cast<LLVMTargetMachine&>(*Target);
      TargetPassConfig *TPC = LLVMTM.createPassConfig(PM);
      PM.add(TPC);
      LLVMTM.addMachineModuleInfo(PM);
      LLVMTM.addMachineFunctionAnalysis(PM, MIR.get());
      TPC->printAndVerify("");

      for (std::string &RunPassName : *RunPassNames) {
        const PassInfo *PI = PR->getPassInfo(RunPassName);
        if (!PI) {
          errs() << argv[0] << ": run-pass " << RunPassName << " is not registered.\n";
          return 1;
        }

        Pass *P;
        if (PI->getTargetMachineCtor())
          P = PI->getTargetMachineCtor()(Target.get());
        else if (PI->getNormalCtor())
          P = PI->getNormalCtor()();
        else {
          errs() << argv[0] << ": cannot create pass: "
                 << PI->getPassName() << "\n";
          return 1;
        }
        std::string Banner
          = std::string("After ") + std::string(P->getPassName());
        PM.add(P);
        TPC->printAndVerify(Banner);
      }
      PM.add(createPrintMIRPass(errs()));
    } else {
      if (!StartAfter.empty()) {
        const PassInfo *PI = PR->getPassInfo(StartAfter);
        if (!PI) {