本文整理汇总了C++中fapi::Target类的典型用法代码示例。如果您正苦于以下问题：C++ Target类的具体用法？C++ Target怎么用？C++ Target使用的例子？那么恭喜您, 这里精选的类代码示例或许可以为您提供帮助。
在下文中一共展示了Target类的19个代码示例，这些例子默认根据受欢迎程度排序。您可以为喜欢或者感觉有用的代码点赞，您的评价将有助于我们的系统推荐出更棒的C++代码示例。
示例1: proc_chiplet_scominit
// HWP entry point, comments in header
fapi::ReturnCode proc_chiplet_scominit(const fapi::Target & i_target)
{
fapi::ReturnCode rc;
uint32_t rc_ecmd = 0;
fapi::TargetType target_type;
std::vector<fapi::Target> initfile_targets;
std::vector<fapi::Target> ex_targets;
std::vector<fapi::Target> mcs_targets;
uint8_t nx_enabled;
uint8_t mcs_pos;
uint8_t ex_pos;
uint8_t num_ex_targets;
uint8_t master_mcs_pos = 0xFF;
fapi::Target master_mcs;
uint8_t enable_xbus_resonant_clocking = 0x0;
uint8_t i2c_slave_address = 0x0;
uint8_t dual_capp_present = 0x0;
ecmdDataBufferBase data(64);
ecmdDataBufferBase cfam_data(32);
ecmdDataBufferBase mask(64);
bool is_master = false;
// mark HWP entry
FAPI_INF("proc_chiplet_scominit: Start");
do
{
rc = proc_check_master_sbe_seeprom(i_target, is_master);
if (!rc.ok())
{
FAPI_ERR("proc_cen_ref_clk_enable: Error from proc_check_master_sbe_seeprom");
break;
}
// obtain target type to determine which initfile(s) to execute
target_type = i_target.getType();
// chip level target
if (target_type == fapi::TARGET_TYPE_PROC_CHIP)
{
// execute FBC SCOM initfile
initfile_targets.push_back(i_target);
FAPI_INF("proc_chiplet_scominit: Executing %s on %s",
PROC_CHIPLET_SCOMINIT_FBC_IF, i_target.toEcmdString());
FAPI_EXEC_HWP(
rc,
fapiHwpExecInitFile,
initfile_targets,
PROC_CHIPLET_SCOMINIT_FBC_IF);
if (!rc.ok())
{
FAPI_ERR("proc_chiplet_scominit: Error from fapiHwpExecInitfile executing %s on %s",
PROC_CHIPLET_SCOMINIT_FBC_IF,
i_target.toEcmdString());
break;
}
// execute PSI SCOM initfile
FAPI_INF("proc_chiplet_scominit: Executing %s on %s",
PROC_CHIPLET_SCOMINIT_PSI_IF, i_target.toEcmdString());
FAPI_EXEC_HWP(
rc,
fapiHwpExecInitFile,
initfile_targets,
PROC_CHIPLET_SCOMINIT_PSI_IF);
if (!rc.ok())
{
FAPI_ERR("proc_chiplet_scominit: Error from fapiHwpExecInitfile executing %s on %s",
PROC_CHIPLET_SCOMINIT_PSI_IF,
i_target.toEcmdString());
break;
}
// execute TP bridge SCOM initfile
FAPI_INF("proc_chiplet_scominit: Executing %s on %s",
PROC_CHIPLET_SCOMINIT_TPBRIDGE_IF, i_target.toEcmdString());
FAPI_EXEC_HWP(
rc,
fapiHwpExecInitFile,
initfile_targets,
PROC_CHIPLET_SCOMINIT_TPBRIDGE_IF);
if (!rc.ok())
{
FAPI_ERR("proc_chiplet_scominit: Error from fapiHwpExecInitfile executing %s on %s",
PROC_CHIPLET_SCOMINIT_TPBRIDGE_IF,
i_target.toEcmdString());
break;
}
// query NX partial good attribute
rc = FAPI_ATTR_GET(ATTR_PROC_NX_ENABLE,
&i_target,
nx_enabled);
if (!rc.ok())
{
FAPI_ERR("proc_chiplet_scominit: Error querying ATTR_PROC_NX_ENABLE");
//.........这里部分代码省略.........
开发者ID:Erich-Hauptli，项目名称:hostboot，代码行数:101，代码来源:proc_chiplet_scominit.C
示例2: mss_eff_config_thermal_powercurve
fapi::ReturnCode mss_eff_config_thermal_powercurve(const fapi::Target & i_target_mba)
{
fapi::ReturnCode rc = fapi::FAPI_RC_SUCCESS;
FAPI_INF("*** Running mss_eff_config_thermal_powercurve on %s ***",
i_target_mba.toEcmdString());
// other variables used in this function
fapi::Target target_chip;
uint8_t port;
uint8_t dimm;
uint8_t custom_dimm;
uint8_t dimm_ranks_array[NUM_PORTS][NUM_DIMMS];
uint32_t power_slope_array[NUM_PORTS][NUM_DIMMS];
uint32_t power_int_array[NUM_PORTS][NUM_DIMMS];
uint32_t power_slope2_array[NUM_PORTS][NUM_DIMMS];
uint32_t power_int2_array[NUM_PORTS][NUM_DIMMS];
uint32_t total_power_slope_array[NUM_PORTS][NUM_DIMMS];
uint32_t total_power_int_array[NUM_PORTS][NUM_DIMMS];
uint32_t total_power_slope2_array[NUM_PORTS][NUM_DIMMS];
uint32_t total_power_int2_array[NUM_PORTS][NUM_DIMMS];
uint32_t cdimm_master_power_slope;
uint32_t cdimm_master_power_intercept;
uint32_t cdimm_supplier_power_slope;
uint32_t cdimm_supplier_power_intercept;
uint32_t cdimm_master_total_power_slope = 0;
uint32_t cdimm_master_total_power_intercept = 0;
uint32_t cdimm_supplier_total_power_slope = 0;
uint32_t cdimm_supplier_total_power_intercept = 0;
uint8_t l_dram_gen;
uint8_t l_logged_error_power_curve = 0;
uint8_t l_logged_error_total_power_curve = 0;
//------------------------------------------------------------------------------
// Get input attributes
//------------------------------------------------------------------------------
// Get Centaur target for the given MBA
rc = fapiGetParentChip(i_target_mba, target_chip);
if (rc) {
FAPI_ERR("Error from fapiGetParentChip");
return rc;
}
rc = FAPI_ATTR_GET(ATTR_EFF_CUSTOM_DIMM, &i_target_mba, custom_dimm);
if (rc) {
FAPI_ERR("Error getting attribute ATTR_EFF_CUSTOM_DIMM");
return rc;
}
rc = FAPI_ATTR_GET(ATTR_EFF_NUM_RANKS_PER_DIMM,
&i_target_mba, dimm_ranks_array);
if (rc) {
FAPI_ERR("Error getting attribute ATTR_EFF_NUM_RANKS_PER_DIMM");
return rc;
}
rc = FAPI_ATTR_GET(ATTR_EFF_DRAM_GEN,
&i_target_mba, l_dram_gen);
if (rc) {
FAPI_ERR("Error getting attribute ATTR_EFF_DRAM_GEN");
return rc;
}
// Only get power curve values for custom dimms to prevent errors
if (custom_dimm == fapi::ENUM_ATTR_EFF_CUSTOM_DIMM_YES)
{
// These are the CDIMM power curve values for only VMEM (DDR3 and DDR4)
rc = FAPI_ATTR_GET(ATTR_CDIMM_VPD_MASTER_POWER_SLOPE,
&target_chip, cdimm_master_power_slope);
if (rc) {
FAPI_ERR("Error getting attribute ATTR_CDIMM_VPD_MASTER_POWER_SLOPE");
return rc;
}
rc = FAPI_ATTR_GET(ATTR_CDIMM_VPD_MASTER_POWER_INTERCEPT,
&target_chip, cdimm_master_power_intercept);
if (rc) {
FAPI_ERR("Error getting attribute ATTR_CDIMM_VPD_MASTER_POWER_INTERCEPT");
return rc;
}
rc = FAPI_ATTR_GET(ATTR_CDIMM_VPD_SUPPLIER_POWER_SLOPE,
&target_chip, cdimm_supplier_power_slope);
if (rc) {
FAPI_ERR("Error getting attribute ATTR_CDIMM_VPD_SUPPLIER_POWER_SLOPE");
return rc;
}
rc = FAPI_ATTR_GET(ATTR_CDIMM_VPD_SUPPLIER_POWER_INTERCEPT,
&target_chip, cdimm_supplier_power_intercept);
if (rc) {
FAPI_ERR("Error getting attribute ATTR_CDIMM_VPD_SUPPLIER_POWER_INTERCEPT");
return rc;
}
// These are for the total CDIMM power (VMEM+VPP for DDR4)
if (l_dram_gen == fapi::ENUM_ATTR_EFF_DRAM_GEN_DDR4)
{
rc = FAPI_ATTR_GET(ATTR_CDIMM_VPD_MASTER_TOTAL_POWER_SLOPE,
&target_chip, cdimm_master_total_power_slope);
if (rc) {
FAPI_ERR("Error getting attribute ATTR_CDIMM_VPD_MASTER_TOTAL_POWER_SLOPE");
return rc;
}
//.........这里部分代码省略.........
开发者ID:AmesianX，项目名称:hostboot，代码行数:101，代码来源:mss_eff_config_thermal.C
示例3: fapiGetOtherSideOfMemChannel
//******************************************************************************
// fapiGetOtherSideOfMemChannel function
//******************************************************************************
fapi::ReturnCode fapiGetOtherSideOfMemChannel(
const fapi::Target& i_target,
fapi::Target & o_target,
const fapi::TargetState i_state)
{
fapi::ReturnCode l_rc;
TargetHandleList l_targetList;
FAPI_DBG(ENTER_MRK "fapiGetOtherSideOfMemChannel. State: 0x%08x",
i_state);
TargetHandle_t l_target =
reinterpret_cast<TargetHandle_t>(i_target.get());
if (l_target == NULL)
{
FAPI_ERR("fapiGetOtherSideOfMemChannel. Embedded NULL target pointer");
/*@
* @errortype
* @moduleid fapi::MOD_FAPI_GET_OTHER_SIDE_OF_MEM_CHANNEL
* @reasoncode fapi::RC_EMBEDDED_NULL_TARGET_PTR
* @devdesc Target has embedded null target pointer
*/
const bool hbSwError = true;
errlHndl_t l_pError = new ERRORLOG::ErrlEntry(
ERRORLOG::ERRL_SEV_UNRECOVERABLE,
fapi::MOD_FAPI_GET_OTHER_SIDE_OF_MEM_CHANNEL,
fapi::RC_EMBEDDED_NULL_TARGET_PTR,
0, 0, hbSwError);
// Attach the error log to the fapi::ReturnCode
l_rc.setPlatError(reinterpret_cast<void *> (l_pError));
}
else if (i_target.getType() == fapi::TARGET_TYPE_MCS_CHIPLET)
{
// find the Centaur that is associated with this MCS
getChildAffinityTargets(l_targetList, l_target,
CLASS_CHIP, TYPE_MEMBUF, false);
if(l_targetList.size() != 1) // one and only one expected
{
FAPI_ERR("fapiGetOtherSideOfMemChannel. expect 1 Centaur %d",
l_targetList.size());
/*@
* @errortype
* @moduleid fapi::MOD_FAPI_GET_OTHER_SIDE_OF_MEM_CHANNEL
* @reasoncode fapi::RC_NO_SINGLE_MEMBUFF
* @userdata1 Number of Memory Buffers
* @userdata2 MCS HUID
* @devdesc fapiGetOtherSideOfMemChannel could not find exactly
* one target on the other side of the correct state
*/
const bool hbSwError = true;
errlHndl_t l_pError = new ERRORLOG::ErrlEntry(
ERRORLOG::ERRL_SEV_UNRECOVERABLE,
fapi::MOD_FAPI_GET_OTHER_SIDE_OF_MEM_CHANNEL,
fapi::RC_NO_SINGLE_MEMBUFF,
l_targetList.size(),
TARGETING::get_huid(l_target),
hbSwError);
// Attach the error log to the fapi::ReturnCode
l_rc.setPlatError(reinterpret_cast<void *> (l_pError));
}
else
{
o_target.setType(fapi::TARGET_TYPE_MEMBUF_CHIP);
o_target.set(reinterpret_cast<void *>(l_targetList[0]));
}
}
else if (i_target.getType() == fapi::TARGET_TYPE_MEMBUF_CHIP)
{
// find the MCS that is associated with this Centaur
getParentAffinityTargets (l_targetList, l_target,
CLASS_UNIT, TYPE_MCS, false);
if(l_targetList.size() != 1) // one and only one expected
{
FAPI_ERR("fapiGetOtherSideOfMemChannel. expect 1 MCS %d",
l_targetList.size());
/*@
* @errortype
* @moduleid fapi::MOD_FAPI_GET_OTHER_SIDE_OF_MEM_CHANNEL
* @reasoncode fapi::RC_NO_SINGLE_MCS
* @userdata1 Number of MCSs
* @userdata2 Membuf HUID
* @devdesc fapiGetOtherSideOfMemChannel could not find exactly
* one target on the other side of the correct state
*/
const bool hbSwError = true;
errlHndl_t l_pError = new ERRORLOG::ErrlEntry(
ERRORLOG::ERRL_SEV_UNRECOVERABLE,
fapi::MOD_FAPI_GET_OTHER_SIDE_OF_MEM_CHANNEL,
fapi::RC_NO_SINGLE_MCS,
l_targetList.size(),
//.........这里部分代码省略.........
开发者ID:gdhh，项目名称:hostboot，代码行数:101，代码来源:fapiPlatSystemConfig.C
示例4: p8_cpu_special_wakeup
/// \retval PM_SUCCESS if something good happens,
/// \retval PM_PROCPM_SPCWKUP* otherwise
fapi::ReturnCode
p8_cpu_special_wakeup( const fapi::Target& i_ex_target,
PROC_SPCWKUP_OPS i_operation ,
PROC_SPCWKUP_ENTITY i_entity )
{
fapi::ReturnCode rc;
fapi::ReturnCode oha_rc;
uint32_t e_rc = 0;
ecmdDataBufferBase data(64);
ecmdDataBufferBase fsi_data(64);
ecmdDataBufferBase polldata(64);
fapi::Target l_parentTarget;
uint8_t attr_chip_unit_pos = 0;
const char* PROC_SPCWKUP_ENTITY_NAMES[] =
{
"HOST",
"FSP",
"OCC",
"PHYP",
"SPW_ALL"
};
const char* PROC_SPCWKUP_OPS_NAMES[] =
{
"DISABLE",
"ENABLE",
"INIT"
};
uint32_t special_wakeup_max_polls;
/// Time (binary in milliseconds) for the first poll check (running/nap
/// case.
/// uint32_t special_wakeup_quick_poll_time = 1;
/// Get an attribute that defines the maximum special wake-up polling
/// timing (binary in milliseconds).
/// Increased timeout to 200ms - 6/10/13
uint32_t special_wakeup_timeout = 200;
/// Get an attribute that defines the special wake-up polling interval
/// (binary in milliseconds).
uint32_t special_wakeup_poll_interval = 5;
uint32_t pollcount = 0;
uint32_t count = 0;
std::vector<fapi::Target> l_chiplets;
std::vector<Target>::iterator itr;
uint8_t oha_spwkup_flag = 0;
uint8_t ignore_xstop_flag = 0;
bool poll_during_xstop_flag = false;
bool xstop_flag = false;
bool bSpwuSetOnEntry = false;
uint8_t inst_pm_state = INST_PM_STATE_UNDEFINED;
//--------------------------------------------------------------------------
// Read the counts of different ENTITY (FSP,OCC,PHYP) from the Attributes
//--------------------------------------------------------------------------
uint32_t phyp_spwkup_count = 0;
uint32_t fsp_spwkup_count = 0;
uint32_t occ_spwkup_count = 0;
uint64_t spwkup_address = 0;
uint64_t history_address = 0;
// detect AISS capaiblity
uint8_t chipHasAISSSWUP = 0;
do
{
FAPI_INF("Executing p8_cpu_special_wakeup %s for %s ...",
PROC_SPCWKUP_OPS_NAMES[i_operation],
PROC_SPCWKUP_ENTITY_NAMES[i_entity]);
// Initialize the attributes to 0.
if (i_operation == SPCWKUP_INIT)
{
FAPI_INF("Processing target %s", i_ex_target.toEcmdString());
FAPI_INF("Initializing ATTR_PM_SPWUP_FSP");
rc = FAPI_ATTR_SET(ATTR_PM_SPWUP_FSP, &i_ex_target, fsp_spwkup_count);
if (rc)
{
FAPI_ERR("fapiSetAttribute of ATTR_PM_SPWUP_FSP with rc = 0x%x", (uint32_t)rc);
break ;
}
FAPI_INF("Initializing ATTR_PM_SPWUP_OCC");
rc = FAPI_ATTR_SET(ATTR_PM_SPWUP_OCC, &i_ex_target, occ_spwkup_count);
if (rc)
//.........这里部分代码省略.........
开发者ID:InventecEdward，项目名称:hostboot，代码行数:101，代码来源:p8_cpu_special_wakeup.C
示例5: p8_pm_pcbs_fsm_trace
/**
* Trace PCBS FSMs for a given EX
*
* @param[in] i_target Chip target
* @param[in] i_msg String to put out in the trace
*
* @retval ECMD_SUCCESS
*/
fapi::ReturnCode
p8_pm_pcbs_fsm_trace ( const fapi::Target& i_target,
uint32_t i_ex_number,
const char * i_msg)
{
fapi::ReturnCode rc;
ecmdDataBufferBase data(64);
uint64_t address;
uint8_t trace_en_flag = false;
uint64_t ex_offset;
do
{
rc = FAPI_ATTR_GET(ATTR_PM_PCBS_FSM_TRACE_EN, NULL, trace_en_flag);
if (rc)
{
FAPI_ERR("fapiGetAttribute of ATTR_PM_PCBS_FSM_TRACE_EN with rc = 0x%x", (uint32_t)rc);
break;
}
// If trace is not enabled, leave.
if (!trace_en_flag)
{
break;
}
ex_offset = i_ex_number * 0x01000000;
// Note: i_msg is put on on each record to allow for trace "greps"
// so as to see the "big picture" across when
// ******************************************************************
// Read PCBS FSM Monitor0
// ******************************************************************
address = EX_PCBS_FSM_MONITOR1_REG_0x100F0170 + ex_offset;
GETSCOM(rc, i_target, address, data);
FAPI_INF("PCBS Monitor0 = 0x%016llX; %s target:%s" ,
data.getDoubleWord(0),
i_msg,
i_target.toEcmdString());
// ******************************************************************
// Read PCBS FSM Monitor1
// ******************************************************************
address = EX_PCBS_FSM_MONITOR2_REG_0x100F0171 + ex_offset;
GETSCOM(rc, i_target, address, data);
FAPI_INF("PCBS Monitor1 = 0x%016llX; %s target:%s" ,
data.getDoubleWord(0),
i_msg,
i_target.toEcmdString());
// ******************************************************************
// Read PCBS DPLL CPM PARM REG
// ******************************************************************
address = EX_DPLL_CPM_PARM_REG_0x100F0152 + ex_offset;
GETSCOM(rc, i_target, address, data);
FAPI_INF("DPLLC Monitor = 0x%016llX; %s target:%s" ,
data.getDoubleWord(0),
i_msg,
i_target.toEcmdString());
// ******************************************************************
// Read PCBS PMGP0
// ******************************************************************
address = EX_PMGP0_0x100F0100 + ex_offset;
GETSCOM(rc, i_target, address, data);
FAPI_INF("PMGP0 Monitor = 0x%016llX; %s target:%s" ,
data.getDoubleWord(0),
i_msg,
i_target.toEcmdString());
} while(0);
return rc;
}
开发者ID:HankChang，项目名称:hostboot，代码行数:82，代码来源:p8_pm_utils.C
示例6: fapiGetParentChip
//******************************************************************************
// fapiGetParentChip function
//******************************************************************************
fapi::ReturnCode fapiGetParentChip(
const fapi::Target& i_chiplet,
fapi::Target & o_chip)
{
FAPI_DBG(ENTER_MRK "fapiGetParentChip");
fapi::ReturnCode l_rc;
// Extract the HostBoot Target pointer for the input chiplet
TARGETING::Target * l_pChiplet =
reinterpret_cast<TARGETING::Target*>(i_chiplet.get());
// Check that the input target is a chiplet
if (!i_chiplet.isChiplet())
{
FAPI_ERR("fapiGetParentChip. Input target type 0x%08x is not a chiplet",
i_chiplet.getType());
/*@
* @errortype
* @moduleid fapi::MOD_FAPI_GET_PARENT_CHIP
* @reasoncode fapi::RC_INVALID_REQUEST
* @userdata1 Type of input target
* @userdata2 Input Target HUID
* @devdesc fapiGetParentChip request for non-chiplet
*/
const bool hbSwError = true;
errlHndl_t l_pError = new ERRORLOG::ErrlEntry(
ERRORLOG::ERRL_SEV_UNRECOVERABLE,
fapi::MOD_FAPI_GET_PARENT_CHIP,
fapi::RC_INVALID_REQUEST,
i_chiplet.getType(),
TARGETING::get_huid(l_pChiplet),
hbSwError);
// Attach the error log to the fapi::ReturnCode
l_rc.setPlatError(reinterpret_cast<void *> (l_pError));
}
else
{
if (l_pChiplet == NULL)
{
/*@
* @errortype
* @moduleid fapi::MOD_FAPI_GET_PARENT_CHIP
* @reasoncode fapi::RC_EMBEDDED_NULL_TARGET_PTR
* @devdesc Target has embedded null target pointer
*/
const bool hbSwError = true;
errlHndl_t l_pError = new ERRORLOG::ErrlEntry(
ERRORLOG::ERRL_SEV_UNRECOVERABLE,
fapi::MOD_FAPI_GET_PARENT_CHIP,
fapi::RC_EMBEDDED_NULL_TARGET_PTR,
0, 0, hbSwError);
// Attach the error log to the fapi::ReturnCode
l_rc.setPlatError(reinterpret_cast<void *> (l_pError));
}
else
{
const TARGETING::Target * l_pChip =
TARGETING::getParentChip(l_pChiplet);
if (l_pChip == NULL)
{
FAPI_ERR("fapiGetParentChip. Parent not found");
/*@
* @errortype
* @moduleid fapi::MOD_FAPI_GET_PARENT_CHIP
* @reasoncode fapi::RC_NO_SINGLE_PARENT
* @userdata1 Input Chiplet Target HUID
* @devdesc fapiGetParentChip did not find one parent
*/
const bool hbSwError = true;
errlHndl_t l_pError = new ERRORLOG::ErrlEntry(
ERRORLOG::ERRL_SEV_UNRECOVERABLE,
fapi::MOD_FAPI_GET_PARENT_CHIP,
fapi::RC_NO_SINGLE_PARENT,
TARGETING::get_huid(l_pChiplet),
0, hbSwError);
// Attach the error log to the fapi::ReturnCode
l_rc.setPlatError(reinterpret_cast<void *> (l_pError));
}
else
{
// Set the output chip type
if (l_pChip->getAttr<TARGETING::ATTR_TYPE>() ==
TARGETING::TYPE_PROC)
{
o_chip.setType(fapi::TARGET_TYPE_PROC_CHIP);
}
else
{
o_chip.setType(fapi::TARGET_TYPE_MEMBUF_CHIP);
}
//.........这里部分代码省略.........
开发者ID:gdhh，项目名称:hostboot，代码行数:101，代码来源:fapiPlatSystemConfig.C
示例7: proc_pcie_config
// HWP entry point, comments in header
fapi::ReturnCode proc_pcie_config(
const fapi::Target & i_target)
{
fapi::ReturnCode rc;
uint8_t pcie_enabled;
uint8_t num_phb;
// mark HWP entry
FAPI_INF("proc_pcie_config: Start");
do
{
// check for supported target type
if (i_target.getType() != fapi::TARGET_TYPE_PROC_CHIP)
{
FAPI_ERR("proc_pcie_config: Unsupported target type");
const fapi::Target & TARGET = i_target;
FAPI_SET_HWP_ERROR(rc, RC_PROC_PCIE_CONFIG_INVALID_TARGET);
break;
}
// query PCIE partial good attribute
rc = FAPI_ATTR_GET(ATTR_PROC_PCIE_ENABLE,
&i_target,
pcie_enabled);
if (!rc.ok())
{
FAPI_ERR("proc_pcie_config: Error querying ATTR_PROC_PCIE_ENABLE");
break;
}
// initialize PBCQ/AIB, configure PBCQ FIRs (only if partial good
// atttribute is set)
if (pcie_enabled == fapi::ENUM_ATTR_PROC_PCIE_ENABLE_ENABLE)
{
// determine PHB configuration
rc = FAPI_ATTR_GET(ATTR_PROC_PCIE_NUM_PHB,
&i_target,
num_phb);
if (!rc.ok())
{
FAPI_ERR("proc_pcie_config: Error from FAPI_ATTR_GET (ATTR_PROC_PCIE_NUM_PHB)");
break;
}
rc = proc_pcie_config_pbcq(i_target);
if (!rc.ok())
{
FAPI_ERR("proc_pcie_config: Error from proc_pcie_config_pbcq");
break;
}
rc = proc_pcie_config_pbcq_fir(i_target, num_phb);
if (!rc.ok())
{
FAPI_ERR("proc_pcie_config: Error from proc_pcie_config_pbcq_fir");
break;
}
rc = proc_a_x_pci_dmi_pll_setup_unmask_lock(
i_target,
PCIE_CHIPLET_0x09000000);
if (!rc.ok())
{
FAPI_ERR("proc_pcie_config: Error from proc_a_x_pci_dmi_pll_setup_unmask_lock");
break;
}
}
else
{
FAPI_DBG("proc_pcie_config: Skipping initialization (partial good)");
}
} while(0);
// mark HWP exit
FAPI_INF("proc_pcie_config: End");
return rc;
}
开发者ID:AmesianX，项目名称:hostboot，代码行数:80，代码来源:proc_pcie_config.C
示例8: parse_addr
fapi::ReturnCode parse_addr(const fapi::Target & i_target_mba,
char addr_string[],
uint8_t mr3_valid,
uint8_t mr2_valid,
uint8_t mr1_valid,
uint8_t l_dram_rows,
uint8_t l_dram_cols,
uint8_t l_addr_inter)
{
fapi::ReturnCode rc;
uint8_t i = MAX_ADDR_BITS;
uint8_t l_slave_rank = 0;
uint8_t l_value;
uint32_t l_value32 = 0;
uint32_t l_sbit, rc_num;
uint32_t l_start = 0;
uint32_t l_len = 0;
uint64_t l_readscom_value = 0;
uint64_t l_end = 0;
uint64_t l_start_addr = 0;
uint8_t l_value_zero = 0;
uint8_t l_user_end_addr = 0;
ecmdDataBufferBase l_data_buffer_64(64);
ecmdDataBufferBase l_data_buffer_rd64(64);
uint8_t l_attr_addr_mode = 0;
uint8_t l_num_cols = 0;
uint8_t l_num_rows = 0;
rc = FAPI_ATTR_GET(ATTR_EFF_SCHMOO_ADDR_MODE, &i_target_mba, l_attr_addr_mode);
if (rc) return rc;
rc = FAPI_ATTR_GET(ATTR_MCBIST_ADDR_NUM_COLS, &i_target_mba, l_num_cols);
if (rc) return rc;
rc = FAPI_ATTR_GET(ATTR_MCBIST_ADDR_NUM_ROWS, &i_target_mba, l_num_rows);
if (rc) return rc;
if (l_num_cols == 0)
{
l_num_cols = l_dram_cols;
}
if (l_num_rows == 0)
{
l_num_rows = l_dram_rows;
}
//Set all the addr reg to 0
//Define Custom String
//Set all Params based on the string.
rc_num = l_data_buffer_64.flushTo0();
if (rc_num)
{
FAPI_ERR("Error in function parse_addr:");
rc.setEcmdError(rc_num);
return rc;
}
l_sbit = 0;
l_value = i;
rc = fapiGetScom(i_target_mba, 0x030106c9, l_data_buffer_64);
if (rc) return rc;
rc_num = l_data_buffer_64.insertFromRight(l_value, l_sbit, 6);
if (rc_num)
{
FAPI_ERR("Error in function parse_addr:");
rc.setEcmdError(rc_num);
return rc;
}
rc = fapiPutScom(i_target_mba, 0x030106c9, l_data_buffer_64);
if (rc) return rc;
i--;
l_sbit = 54;
l_value = i;
rc = fapiGetScom(i_target_mba, 0x030106c8, l_data_buffer_64);
if (rc) return rc;
rc_num = l_data_buffer_64.insertFromRight(l_value, l_sbit, 6);
if (rc_num)
{
FAPI_ERR("Error in function parse_addr:");
rc.setEcmdError(rc_num);
return rc;
}
rc = fapiPutScom(i_target_mba, 0x030106c8, l_data_buffer_64);
if (rc) return rc;
i--;
////FAPI_INF("Inside strcmp ba2");
l_sbit = 48;
l_value = i;
rc = fapiGetScom(i_target_mba, 0x030106c8, l_data_buffer_64);
if (rc) return rc;
rc_num = l_data_buffer_64.insertFromRight(l_value, l_sbit, 6);
if (rc_num)
{
FAPI_ERR("Error in function parse_addr:");
rc.setEcmdError(rc_num);
return rc;
}
rc = fapiPutScom(i_target_mba, 0x030106c8, l_data_buffer_64);
//.........这里部分代码省略.........
开发者ID:HankChang，项目名称:hostboot，代码行数:101，代码来源:mss_mcbist_address.C
示例9: loadOCC
/**
* @brief Execute procedures and steps necessary
* to load OCC data in specified processor
*
* @param[in] i_target Target proc to load
* @param[in] i_homerVirtAddrBase Virtual
* address of current
* proc's HOMER
* @param[in] i_homerPhysAddrBase Physical
* address of current
* proc's HOMER
*
* @return errlHndl_t Error log image load failed
*/
errlHndl_t loadOCC(TARGETING::Target* i_target,
uint64_t i_homerPhysAddr,
uint64_t i_homerVirtAddr,
uint64_t i_commonPhysAddr)
{
errlHndl_t l_errl = NULL;
TRACFCOMP( g_fapiTd,
ENTER_MRK"loadOCC" );
do{
// Remember where we put things
if( i_target )
{
i_target->setAttr<ATTR_HOMER_PHYS_ADDR>(i_homerPhysAddr);
i_target->setAttr<ATTR_HOMER_VIRT_ADDR>(i_homerVirtAddr);
}
// cast OUR type of target to a FAPI type of target.
const fapi::Target l_fapiTarg(fapi::TARGET_TYPE_PROC_CHIP,
(const_cast<Target*>(i_target)));
TRACFCOMP( g_fapiTd, "FapiTarget: %s",l_fapiTarg.toEcmdString());
//==============================
//Setup for OCC Load
//==============================
// BAR0 is the Entire HOMER (start of HOMER contains OCC base Image)
// Bar size is in MB, obtained value of 4MB from Greg Still
TRACUCOMP( g_fapiImpTd,
INFO_MRK"loadOCC: OCC Address: 0x%.8X, size=0x%.8X",
i_homerPhysAddr, VMM_HOMER_INSTANCE_SIZE_IN_MB);
FAPI_INVOKE_HWP( l_errl,
p8_pba_bar_config,
l_fapiTarg,
0,
i_homerPhysAddr,
VMM_HOMER_INSTANCE_SIZE_IN_MB,
PBA_CMD_SCOPE_NODAL );
if (l_errl)
{
TRACFCOMP( g_fapiImpTd,
ERR_MRK"loadOCC: Bar0 config failed!" );
l_errl->collectTrace(FAPI_TRACE_NAME,256);
l_errl->collectTrace(FAPI_IMP_TRACE_NAME,256);
break;
}
// BAR1 is what OCC uses to talk to the Centaur
// Bar size is in MB
uint64_t centaur_addr =
i_target->getAttr<ATTR_IBSCOM_PROC_BASE_ADDR>();
FAPI_INVOKE_HWP( l_errl,
p8_pba_bar_config,
l_fapiTarg,
1, //i_index
centaur_addr, //i_pba_bar_addr
(uint64_t)OCC_IBSCOM_RANGE_IN_MB, //i_pba_bar_size
PBA_CMD_SCOPE_NODAL ); //i_pba_cmd_scope
if ( l_errl )
{
TRACFCOMP( g_fapiImpTd,
ERR_MRK"loadOCC: Bar1 config failed!" );
l_errl->collectTrace(FAPI_TRACE_NAME,256);
l_errl->collectTrace(FAPI_IMP_TRACE_NAME,256);
break;
}
// BAR3 is the OCC Common Area
// Bar size is in MB, obtained value of 8MB from Tim Hallett
TRACUCOMP( g_fapiImpTd,
INFO_MRK"loadOCC: OCC Common Addr: 0x%.8X,size=0x%.8X",
i_commonPhysAddr,VMM_OCC_COMMON_SIZE_IN_MB);
FAPI_INVOKE_HWP( l_errl,
p8_pba_bar_config,
l_fapiTarg,
3,
i_commonPhysAddr,
VMM_OCC_COMMON_SIZE_IN_MB,
PBA_CMD_SCOPE_NODAL );
if ( l_errl != NULL )
{
//.........这里部分代码省略.........
开发者ID:bjwyman，项目名称:hostboot，代码行数:101，代码来源:occ_common.C
示例10: proc_mpipl_chip_cleanup
//------------------------------------------------------------------------------
// name: proc_mpipl_chip_cleanup
//------------------------------------------------------------------------------
// purpose:
// To enable MCD recovery
//
// Note: PHBs are left in ETU reset state after executing proc_mpipl_nest_cleanup, which runs before this procedure. PHYP releases PHBs from ETU reset post HostBoot IPL.
//
// SCOM regs
//
// 1) MCD even recovery control register
// 0000000002013410 (SCOM)
// bit 0 (MCD_REC_EVEN_ENABLE): 0 to 1 transition needed to start, reset to 0 at end of request.
// bit 5 (MCD_REC_EVEN_REQ_PEND)
//
//
// 2) MCD odd recovery control register
// 0000000002013411 (SCOM)
// bit 0 (MCD_REC_ODD_ENABLE): 0 to 1 transition needed to start, reset to 0 at end of request.
// bit 5 (MCD_REC_ODD_REQ_PEND)
//
// 3) Clear PCI Nest FIR registers
// 02012000 (SCOM)
// 02012400 (SCOM)
// 02012800 (SCOM)
//
// parameters:
// 'i_target' is reference to chip target
//
// returns:
// FAPI_RC_SUCCESS (success, MCD recovery enabled for odd and even slices)
//
// RC_MCD_RECOVERY_NOT_DISABLED_RC (MCD recovery for even or odd slice is not disabled; therefore can't re-enable MCD recovery)
// (Note: refer to file eclipz/chips/p8/working/procedures/xml/error_info/proc_mpipl_chip_cleanup_errors.xml)
//
// getscom/putscom fapi errors
// fapi error assigned from eCMD function failure
//
//------------------------------------------------------------------------------
fapi::ReturnCode proc_mpipl_chip_cleanup(const fapi::Target &i_target){
const char *procedureName = "proc_mpipl_chip_cleanup"; //Name of this procedure
fapi::ReturnCode rc; //fapi return code value
uint32_t rc_ecmd = 0; //ecmd return code value
const uint32_t data_size = 64; //Size of data buffer
const int MAX_MCD_DIRS = 2; //Max of 2 MCD Directories (even and odd)
ecmdDataBufferBase fsi_data[MAX_MCD_DIRS];
const uint64_t ARY_MCD_RECOVERY_CTRL_REGS_ADDRS[MAX_MCD_DIRS] = {
0x0000000002013410, //MCD even recovery control register address
0x0000000002013411 //MCD odd recovery control register address
};
const uint32_t MCD_RECOVERY_CTRL_REG_BIT_POS0 = 0; //Bit 0 of MCD even and odd recovery control regs
const char *ARY_MCD_DIR_STRS[MAX_MCD_DIRS] = {
"Even", //Ptr to char string "Even" for even MCD
"Odd" //Ptr to char string "Odd" for odd MCD
};
const int MAX_PHBS = 3;
const uint64_t PCI_NEST_FIR_REG_ADDRS[MAX_PHBS] = {
0x02012000,
0x02012400,
0x02012800
};
do {
//Set bit length for 64-bit buffers
rc_ecmd = fsi_data[0].setBitLength(data_size);
rc_ecmd |= fsi_data[1].setBitLength(data_size);
if(rc_ecmd) {
rc.setEcmdError(rc_ecmd);
break;
}
//Verify MCD recovery was previously disabled for even and odd slices
//If not, this is an error condition
for (int counter = 0; counter < MAX_MCD_DIRS; counter++) {
FAPI_DBG("Verifying MCD %s Recovery is disabled, target=%s", ARY_MCD_DIR_STRS[counter], i_target.toEcmdString());
//Get data from MCD Even or Odd Recovery Ctrl reg
rc = fapiGetScom(i_target, ARY_MCD_RECOVERY_CTRL_REGS_ADDRS[counter], fsi_data[counter]);
if (!rc.ok()) {
FAPI_ERR("%s: fapiGetScom error (addr: 0x%08llX), target=%s", procedureName, ARY_MCD_RECOVERY_CTRL_REGS_ADDRS[counter], i_target.toEcmdString());
break;
}
//Check whether bit 0 is 0, meaning MCD recovery is disabled as expected
if( fsi_data[counter].getBit(MCD_RECOVERY_CTRL_REG_BIT_POS0) ) {
FAPI_ERR("%s: MCD %s Recovery not disabled as expected, target=%s", procedureName, ARY_MCD_DIR_STRS[counter], i_target.toEcmdString());
const fapi::Target & CHIP_TARGET = i_target;
const uint64_t & MCD_RECOV_CTRL_REG_ADDR = ARY_MCD_RECOVERY_CTRL_REGS_ADDRS[counter];
ecmdDataBufferBase & MCD_RECOV_CTRL_REG_DATA = fsi_data[counter];
FAPI_SET_HWP_ERROR(rc, RC_MPIPL_MCD_RECOVERY_NOT_DISABLED_RC);
break;
}
}
if(!rc.ok()) {
break;
}
//Assert bit 0 of MCD Recovery Ctrl regs to enable MCD recovery
for (int counter = 0; counter < MAX_MCD_DIRS; counter++) {
//.........这里部分代码省略.........
开发者ID:HankChang，项目名称:hostboot，代码行数:101，代码来源:proc_mpipl_chip_cleanup.C
示例11: p8_pm_prep_for_reset
/**
* p8_pm_prep_for_reset Call underlying unit procedure to perform readiness for
* reinitialization of PM complex.
*
* @param[in] i_primary_chip_target Primary Chip target which will be passed
* to all the procedures
* @param[in] i_secondary_chip_target Secondary Chip target will be passed for
* pmc_init -reset only if it is DCM otherwise this should be NULL.
* @param[in] i_mode (PM_RESET (hard - will kill the PMC);
* PM_RESET_SOFT (will not fully reset the PMC))
*
* @retval ECMD_SUCCESS
* @retval ERROR defined in xml
*/
fapi::ReturnCode
p8_pm_prep_for_reset( const fapi::Target &i_primary_chip_target,
const fapi::Target &i_secondary_chip_target,
uint32_t i_mode )
{
fapi::ReturnCode rc;
fapi::ReturnCode rc_hold;
uint32_t e_rc = 0;
std::vector<fapi::Target> l_exChiplets;
ecmdDataBufferBase data(64);
ecmdDataBufferBase mask(64);
uint64_t address = 0;
const char * PM_MODE_NAME_VAR; // Defines storage for PM_MODE_NAME
bool b_special_wakeup_pri = false;
bool b_special_wakeup_sec = false;
fapi::Target dummy;
do
{
FAPI_INF("p8_pm_prep_for_reset start ....");
uint8_t ipl_mode = 0;
rc = FAPI_ATTR_GET(ATTR_IS_MPIPL, NULL, ipl_mode);
if (!rc.ok())
{
FAPI_ERR("fapiGetAttribute of ATTR_IS_MPIPL rc = 0x%x", (uint32_t)rc);
break;
}
FAPI_INF("IPL mode = %s", ipl_mode ? "MPIPL" : "NORMAL");
if (i_mode == PM_RESET)
{
FAPI_INF("Hard reset detected");
}
else if (i_mode == PM_RESET_SOFT)
{
FAPI_INF("Soft reset detected. Idle functions will not be affected");
}
else
{
FAPI_ERR("Mode parameter value not supported: %u", i_mode);
uint32_t & MODE = i_mode;
FAPI_SET_HWP_ERROR(rc, RC_PROCPM_PREP_UNSUPPORTED_MODE_ERR);
break;
}
if ( i_secondary_chip_target.getType() == TARGET_TYPE_NONE )
{
if ( i_primary_chip_target.getType() == TARGET_TYPE_NONE )
{
FAPI_ERR("Set primay target properly for SCM " );
const fapi::Target PRIMARY_TARGET = i_primary_chip_target;
FAPI_SET_HWP_ERROR(rc, RC_PROCPM_PREP_TARGET_ERR);
break;
}
FAPI_INF("Running on SCM");
}
else
{
FAPI_INF("Running on DCM");
}
// ******************************************************************
// Clear the Deep Exit Masks to allow Special Wake-up to occur
// ******************************************************************
// Primary
rc = clear_deep_exit_mask(i_primary_chip_target);
if (rc)
{
FAPI_ERR("clear_deep_exit_mask: Failed for Primary Target %s",
i_primary_chip_target.toEcmdString());
break;
}
// Secondary
if ( i_secondary_chip_target.getType() != TARGET_TYPE_NONE )
{
rc = clear_deep_exit_mask(i_secondary_chip_target);
//.........这里部分代码省略.........
开发者ID:InventecEdward，项目名称:hostboot，代码行数:101，代码来源:p8_pm_prep_for_reset.C
示例12: p8_pmc_force_vsafe
// function: xxx
/// \param[in] i_target Chip target
// returns: ECMD_SUCCESS if something good happens,
// BAD_RETURN_CODE otherwise
fapi::ReturnCode
p8_pmc_force_vsafe( const fapi::Target& i_target,
const fapi::Target& i_dcm_target)
{
fapi::ReturnCode rc;
ecmdDataBufferBase data(64);
ecmdDataBufferBase pmcstatusreg(64);
uint32_t e_rc = 0;
// maximum number of status poll attempts to make before giving up
const uint32_t MAX_POLL_ATTEMPTS = 0x200;
uint32_t count = 0;
uint16_t pvsafe = 0;
bool l_set;
uint16_t pstate_target = 0;
uint16_t pstate_step_target = 0;
uint16_t pstate_actual = 0;
uint8_t DONE_FLAG = 0;
uint8_t pmc_error = 0;
uint8_t intchp_error = 0;
uint8_t any_error = 0;
uint8_t any_ongoing = 0;
uint8_t dummy = 0;
FAPI_INF("p8_pmc_force_vsafe start to primary target %s",
i_target.toEcmdString());
do
{
// ******************************************************************
// - PMC_MODE_REG checking
// ******************************************************************
rc = fapiGetScom(i_target, PMC_MODE_REG_0x00062000, data );
if (rc)
{
FAPI_ERR("fapiGetScom(PMC_MODE_REG_0x00062000) failed.");
break;
}
if ( (data.isBitClear(0) && data.isBitClear(1) ))
{
FAPI_INF("PMC is not in HARDWARE or FIRMWARE AUCTION MODE so hardware mechanism cannot be used.");
break;
}
if ( ( data.isBitClear(3) ))
{
FAPI_ERR("PMC is disabled for Voltage changes");
const fapi::Target & CHIP = i_target;
const uint64_t & PMCMODE = data.getDoubleWord(0);
FAPI_SET_HWP_ERROR(rc, RC_PROCPM_VOLTAGE_CHANGE_MODE_ERR);
break;
}
if ( ( !data.isBitClear(5) ))
{
FAPI_ERR("PMC is disabled PMC_MASTER_SEQUENCER");
const fapi::Target & CHIP = i_target;
const uint64_t & PMCMODE = data.getDoubleWord(0);
FAPI_SET_HWP_ERROR(rc, RC_PROCPM_MST_SEQUENCER_STATE_ERR);
break;
}
// ****************************************************************************
// - PMC_STATE_MONITOR_AND_CTRL_REG PMC_PARAMETER_REG1 before the psafe
// ****************************************************************************
rc = fapiGetScom(i_target, PMC_PARAMETER_REG1_0x00062006, data );
if (rc)
{
FAPI_ERR("fapiGetScom(PMC_PARAMETER_REG1_0x00062006) failed.");
break;
}
e_rc |= data.extractToRight( &pvsafe,22,8);
if (e_rc)
{
rc.setEcmdError(e_rc);
break;
}
rc = fapiGetScom(i_target, PMC_PSTATE_MONITOR_AND_CTRL_REG_0x00062002, data );
if (rc)
{
FAPI_ERR("fapiGetScom(PMC_PSTATE_MONITOR_AND_CTRL_REG_0x00062002) failed.");
break;
}
e_rc |= data.extractToRight( &pstate_target,0,8);
e_rc |= data.extractToRight( &pstate_step_target,8,8);
e_rc |= data.extractToRight( &pstate_actual,16,8);
if (e_rc)
{
rc.setEcmdError(e_rc);
//.........这里部分代码省略.........
开发者ID:AmesianX，项目名称:hostboot，代码行数:101，代码来源:p8_pmc_force_vsafe.C
示例13: io_fir_isolation
ReturnCode io_fir_isolation(const fapi::Target &i_target){
ReturnCode o_rc;
uint32_t rc_ecmd=0;
fir_io_interface_t interface;
io_interface_t gcr_interface; // requires different base address for gcr scoms
uint32_t group;
ecmdDataBufferBase fir_data(64);
rc_ecmd|=fir_data.flushTo0();
if(rc_ecmd)
{
o_rc.setEcmdError(rc_ecmd);
return(o_rc);
}
//on dmi
if( (i_target.getType() == fapi::TARGET_TYPE_MCS_CHIPLET )){
FAPI_DBG("This is a Processor DMI bus using base DMI scom address");
interface=FIR_CP_IOMC0_P0; // base scom for MC bus
gcr_interface=CP_IOMC0_P0;
o_rc=read_fir_reg(i_target,interface,fir_data);
group=3;
if(o_rc)
return(o_rc);
o_rc=io_error_isolation(i_target,gcr_interface,group,fir_data);
}
//on cen side
else if((i_target.getType() == fapi::TARGET_TYPE_MEMBUF_CHIP)){
FAPI_DBG("This is a Centaur DMI bus using base DMI scom address");
interface=FIR_CEN_DMI;
gcr_interface=CEN_DMI;
o_rc=read_fir_reg(i_target,interface,fir_data);
group=0;
if(o_rc)
return(o_rc);
o_rc=io_error_isolation(i_target,gcr_interface,group,fir_data);
}
// on x bus
else if((i_target.getTyp
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