void RtcInit(void)
{
	SysCtlPeripheralEnable( SYSCTL_PERIPH_TIMER0 );
    TimerConfigure( TIMER0_BASE, TIMER_CFG_32_BIT_PER );
	
	/* Ensure interrupts do not start until the scheduler is running. */
	portDISABLE_INTERRUPTS();
	
	/* The rate at which the timer will interrupt. */
    TimerLoadSet( TIMER0_BASE, TIMER_A, configCPU_CLOCK_HZ );
	IntPrioritySet( INT_TIMER0A, configKERNEL_INTERRUPT_PRIORITY );
    IntEnable( INT_TIMER0A );
    TimerIntEnable( TIMER0_BASE, TIMER_TIMA_TIMEOUT );

    /* setup timer 1 for cpu usage statistic */
    SysCtlPeripheralEnable( SYSCTL_PERIPH_TIMER1 );
    TimerConfigure( TIMER1_BASE, TIMER_CFG_32_BIT_PER );

	/* Just used to measure time. */
    TimerLoadSet(TIMER1_BASE, TIMER_A, configCPU_CLOCK_HZ / 10000 );    /* sys tick = 1msec, so 100usec will be set */
	IntPrioritySet( INT_TIMER1A, configMAX_SYSCALL_INTERRUPT_PRIORITY );
    IntEnable( INT_TIMER1A );
    TimerIntEnable( TIMER1_BASE, TIMER_TIMA_TIMEOUT );

    timeval = 0;
    timeoffset = 0;

    ulHighFrequencyTimerTicks = 0;

	/* Enable rtc timer. */	
    TimerEnable( TIMER0_BASE, TIMER_A );
    TimerEnable( TIMER1_BASE, TIMER_A );
}

static void USBAINTCConfigure(int usbInstance)
{   

	if(usbInstance)
	{
	    /* Registering the Interrupt Service Routine(ISR). */
	    IntRegister(SYS_INT_USB1, USB1HostIntHandler);

	    /* Setting the priority for the system interrupt in AINTC. */
	    IntPrioritySet(SYS_INT_USB1, 0, AINTC_HOSTINT_ROUTE_IRQ);

	    /* Enabling the system interrupt in AINTC. */
	    IntSystemEnable(SYS_INT_USB1);
	}
	else
	{
	    /* Registering the Interrupt Service Routine(ISR). */
	    IntRegister(SYS_INT_USB0, USB0HostIntHandler);

	    /* Setting the priority for the system interrupt in AINTC. */
	    IntPrioritySet(SYS_INT_USB0, 0, AINTC_HOSTINT_ROUTE_IRQ);

	    /* Enabling the system interrupt in AINTC. */
	    IntSystemEnable(SYS_INT_USB0);
	}
}

/* Interrupt mapping to AINTC and registering McSPI ISR */
void McSPIAintcConfigure(unsigned char instance)
{
	switch(instance)
	{
		case 0:
	    	//IntProtectionDisable();
			/* Register McSPIIsr interrupt handler */
			IntRegister(SYS_INT_SPI0INT, McSPI0Isr);

			/* Set Interrupt Priority */
			IntPrioritySet(SYS_INT_SPI0INT, 0, AINTC_HOSTINT_ROUTE_IRQ);

			/* Enable system interrupt in AINTC */
			IntSystemEnable(SYS_INT_SPI0INT);
	        //IntProtectionEnable();
			break;
		case 1:
	    	//IntProtectionDisable();
			/* Register McSPIIsr interrupt handler */
			IntRegister(SYS_INT_SPI1INT, McSPI1Isr);

			/* Set Interrupt Priority */
			IntPrioritySet(SYS_INT_SPI1INT, 0, AINTC_HOSTINT_ROUTE_IRQ);

			/* Enable system interrupt in AINTC */
			IntSystemEnable(SYS_INT_SPI1INT);
	        //IntProtectionEnable();
			break;
	}
}

void _EDMAAppRegisterEdma3Interrupts()
{
    /* Enable IRQ in CPSR. */
    IntMasterIRQEnable();

    /* Intialize ARM interrupt controller */
    IntAINTCInit();

    /* Register Interrupts Here */

    /******************** Completion Interrupt ********************************/

    /* Registers Edma3ComplHandler0 Isr in Interrupt Vector Table of AINTC. */
    IntRegister(SYS_INT_EDMACOMPINT , _EDMAAppEdma3ccComplIsr);

    /* Set priority for system interrupt in AINTC */
    IntPrioritySet(SYS_INT_EDMACOMPINT, 0u, AINTC_HOSTINT_ROUTE_IRQ);

    /* Enable the EDMA CC0 system interrupt in AINTC.*/
    IntSystemEnable(SYS_INT_EDMACOMPINT);

    /********************** CC Error Interrupt ********************************/

    /*
    ** Registers the EDMA3_0 Channel Controller 0 Error Interrupt Isr in the
    ** Interrupt Vector Table of AINTC.
    */
    IntRegister(SYS_INT_EDMAERRINT , _EDMAAppEdma3ccErrIsr);

    /* Set priority for system interrupt in AINTC */
    IntPrioritySet(SYS_INT_EDMAERRINT, 0u, AINTC_HOSTINT_ROUTE_IRQ);

    /* Enable the EDMA CCERR system interrupt AINTC.*/
    IntSystemEnable(SYS_INT_EDMAERRINT);
}

//
// \brief  This function confiugres the AINTC to receive UART interrupts.
//
void CPDMAAINTCConfigure(int usbInstance)
{
	if(usbInstance)
	{
    	IntProtectionDisable();
		/* Registering the Interrupt Service Routine(ISR). */
		IntRegister(SYS_INT_USBSSINT, USB1HostIntHandler);

		/* Setting the priority for the system interrupt in AINTC. */
		IntPrioritySet(SYS_INT_USBSSINT, 0, AINTC_HOSTINT_ROUTE_IRQ);

		/* Enabling the system interrupt in AINTC. */
		IntSystemEnable(SYS_INT_USBSSINT);
        IntProtectionEnable();
	}
	else
	{
    	IntProtectionDisable();
	    /* Registering the Interrupt Service Routine(ISR). */
	    IntRegister(SYS_INT_USBSSINT, USB0HostIntHandler);

	    /* Setting the priority for the system interrupt in AINTC. */
	    IntPrioritySet(SYS_INT_USBSSINT, 0, AINTC_HOSTINT_ROUTE_IRQ);

	    /* Enabling the system interrupt in AINTC. */
	    IntSystemEnable(SYS_INT_USBSSINT);
        IntProtectionEnable();
	}
}

void vInitialiseTimerForIntQueueTest( void )
{
unsigned long ulFrequency;

	/* Timer 2 and 3 are utilised for this test. */
	SysCtlPeripheralEnable( SYSCTL_PERIPH_TIMER2 );
    SysCtlPeripheralEnable( SYSCTL_PERIPH_TIMER3 );
    TimerConfigure( TIMER2_BASE, TIMER_CFG_32_BIT_PER );
    TimerConfigure( TIMER3_BASE, TIMER_CFG_32_BIT_PER );
	
	/* Set the timer interrupts to be above the kernel.  The interrupts are
	 assigned different priorities so they nest with each other. */
	IntPrioritySet( INT_TIMER2A, configMAX_SYSCALL_INTERRUPT_PRIORITY + ( 1 << 5 ) ); /* Shift left 5 as only the top 3 bits are implemented. */
	IntPrioritySet( INT_TIMER3A, configMAX_SYSCALL_INTERRUPT_PRIORITY );

	/* Ensure interrupts do not start until the scheduler is running. */
	portDISABLE_INTERRUPTS();
	
	/* The rate at which the timers will interrupt. */
	ulFrequency = configCPU_CLOCK_HZ / tmrTIMER_2_FREQUENCY;	
    TimerLoadSet( TIMER2_BASE, TIMER_A, ulFrequency );
    IntEnable( INT_TIMER2A );
    TimerIntEnable( TIMER2_BASE, TIMER_TIMA_TIMEOUT );

	/* The rate at which the timers will interrupt. */
	ulFrequency = configCPU_CLOCK_HZ / tmrTIMER_3_FREQUENCY;	
    TimerLoadSet( TIMER3_BASE, TIMER_A, ulFrequency );
    IntEnable( INT_TIMER3A );
    TimerIntEnable( TIMER3_BASE, TIMER_TIMA_TIMEOUT );

    /* Enable both timers. */	
    TimerEnable( TIMER2_BASE, TIMER_A );
    TimerEnable( TIMER3_BASE, TIMER_A );
}

/*
** This function configures the AINTC to receive EDMA3 interrupts.
*/
static void EDMA3AINTCConfigure(void)
{
    /* Initializing the ARM Interrupt Controller. */
    IntAINTCInit();

    /* Registering EDMA3 Channel Controller transfer completion interrupt.  */
    IntRegister(EDMA_COMPLTN_INT_NUM, Edma3CompletionIsr);

    /* Setting the priority for EDMA3CC completion interrupt in AINTC. */
    IntPrioritySet(EDMA_COMPLTN_INT_NUM, 0, AINTC_HOSTINT_ROUTE_IRQ);

    /* Registering EDMA3 Channel Controller Error Interrupt. */
    IntRegister(EDMA_ERROR_INT_NUM, Edma3CCErrorIsr);

    /* Setting the priority for EDMA3CC Error interrupt in AINTC. */
    IntPrioritySet(EDMA_ERROR_INT_NUM, 0, AINTC_HOSTINT_ROUTE_IRQ);

    /* Enabling the EDMA3CC completion interrupt in AINTC. */
    IntSystemEnable(EDMA_COMPLTN_INT_NUM);
    
    /* Enabling the EDMA3CC Error interrupt in AINTC. */
    IntSystemEnable(EDMA_ERROR_INT_NUM);

    /* Registering HSMMC Interrupt handler */
    IntRegister(MMCSD_INT_NUM, HSMMCSDIsr);

    /* Setting the priority for EDMA3CC completion interrupt in AINTC. */
    IntPrioritySet(MMCSD_INT_NUM, 0, AINTC_HOSTINT_ROUTE_IRQ);

    /* Enabling the HSMMC interrupt in AINTC. */
    IntSystemEnable(MMCSD_INT_NUM);

    /* Enabling IRQ in CPSR of ARM processor. */
    IntMasterIRQEnable();
}

// WTimer1A is used to measure the width of the pulses
// WTimer1B is used to turn off motors if the connection to the RX is lost
void initRX(void) {
    SysCtlPeripheralEnable(SYSCTL_PERIPH_WTIMER1); // Enable Wide Timer1 peripheral
    SysCtlDelay(2); // Insert a few cycles after enabling the peripheral to allow the clock to be fully activated

    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOC); // Enable GPIOC peripheral
    SysCtlDelay(2); // Insert a few cycles after enabling the peripheral to allow the clock to be fully activated
    GPIOPinConfigure(GPIO_PC6_WT1CCP0); // Use alternate function
    GPIOPinTypeTimer(GPIO_PORTC_BASE, GPIO_PIN_6); // Use pin with timer peripheral

    // Split timers and enable timer A event up-count timer and timer B as a periodic timer
    TimerConfigure(WTIMER1_BASE, TIMER_CFG_SPLIT_PAIR | TIMER_CFG_A_CAP_TIME_UP | TIMER_CFG_B_PERIODIC);

    // Configure WTimer1A
    TimerControlEvent(WTIMER1_BASE, TIMER_A, TIMER_EVENT_BOTH_EDGES); // Interrupt on both edges
    TimerIntRegister(WTIMER1_BASE, TIMER_A, CaptureHandler); // Register interrupt handler
    TimerIntEnable(WTIMER1_BASE, TIMER_CAPA_EVENT); // Enable timer capture A event interrupt
    IntPrioritySet(INT_WTIMER1A, 0); // Configure Wide Timer 1A interrupt priority as 0
    IntEnable(INT_WTIMER1A); // Enable Wide Timer 1A interrupt

    // Configure WTimer1B
    timerLoadValue = SysCtlClockGet() / 10 - 1; // Set to interrupt every 100ms
    TimerLoadSet(WTIMER1_BASE, TIMER_B, timerLoadValue);
    TimerIntRegister(WTIMER1_BASE, TIMER_B, TimeoutHandler); // Register interrupt handler
    TimerIntEnable(WTIMER1_BASE, TIMER_TIMB_TIMEOUT); // Enable timer timeout interrupt
    IntPrioritySet(INT_WTIMER1B, 0); // Configure Wide Timer 1B interrupt priority as 0
    IntEnable(INT_WTIMER1B); // Enable Wide Timer 1B interrupt

    TimerEnable(WTIMER1_BASE, TIMER_BOTH); // Enable both timers

    validRXData = false;
}

/* Configures AINTC to generate interrupt */
void I2CAINTCConfigure(new_twi* TwiStruct)
{
    /* Intialize the ARM Interrupt Controller(AINTC) */
    //IntAINTCInit();

    switch (TwiStruct->TwiNr)
    {
    case 0:
    	IntProtectionDisable();
        /* Registering the Interrupt Service Routine(ISR). */
        IntRegister(SYS_INT_I2C1_IRQ, I2C0Isr);

        /* Setting the priority for the system interrupt in AINTC. */
        IntPrioritySet(SYS_INT_I2C1_IRQ, TwiStruct->Priority, AINTC_HOSTINT_ROUTE_IRQ );

        /* Enabling the system interrupt in AINTC. */
        IntSystemEnable(SYS_INT_I2C1_IRQ);
        IntProtectionEnable();
    	break;
    case 1:
    	IntProtectionDisable();
        /* Registering the Interrupt Service Routine(ISR). */
        IntRegister(SYS_INT_I2C2_IRQ, I2C1Isr);

        /* Setting the priority for the system interrupt in AINTC. */
        IntPrioritySet(SYS_INT_I2C2_IRQ, TwiStruct->Priority, AINTC_HOSTINT_ROUTE_IRQ );

        /* Enabling the system interrupt in AINTC. */
        IntSystemEnable(SYS_INT_I2C2_IRQ);
        IntProtectionEnable();
    	break;
    case 2:
    	IntProtectionDisable();
        /* Registering the Interrupt Service Routine(ISR). */
        IntRegister(SYS_INT_I2C3_IRQ, I2C2Isr);

        /* Setting the priority for the system interrupt in AINTC. */
        IntPrioritySet(SYS_INT_I2C3_IRQ, TwiStruct->Priority, AINTC_HOSTINT_ROUTE_IRQ );

        /* Enabling the system interrupt in AINTC. */
        IntSystemEnable(SYS_INT_I2C3_IRQ);
        IntProtectionEnable();
    	break;
    case 3:
    	IntProtectionDisable();
        /* Registering the Interrupt Service Routine(ISR). */
        IntRegister(SYS_INT_I2C4_IRQ, I2C3Isr);

        /* Setting the priority for the system interrupt in AINTC. */
        IntPrioritySet(SYS_INT_I2C4_IRQ, TwiStruct->Priority, AINTC_HOSTINT_ROUTE_IRQ );

        /* Enabling the system interrupt in AINTC. */
        IntSystemEnable(SYS_INT_I2C4_IRQ);
        IntProtectionEnable();
    	break;
    }
}

int
main(void)
{

	
		
	//set clock	
	SysCtlClockSet(SYSCTL_SYSDIV_1 | SYSCTL_USE_OSC | SYSCTL_OSC_MAIN |
                   SYSCTL_XTAL_8MHZ);


   
        

     //PB1
     SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOB);
     GPIOPadConfigSet(GPIO_PORTB_BASE,GPIO_PIN_1,GPIO_STRENGTH_4MA,GPIO_PIN_TYPE_STD);
     GPIODirModeSet(GPIO_PORTB_BASE,GPIO_PIN_1,GPIO_DIR_MODE_IN);
     GPIOPortIntRegister(GPIO_PORTB_BASE, PortBIntHandler);
     GPIOIntTypeSet(GPIO_PORTB_BASE, GPIO_PIN_1, GPIO_BOTH_EDGES);
     GPIOPinIntEnable(GPIO_PORTB_BASE, GPIO_PIN_1);

        
    // Status
                SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOF);
    GPIOPadConfigSet(GPIO_PORTF_BASE,GPIO_PIN_2,GPIO_STRENGTH_4MA,GPIO_PIN_TYPE_STD);
        GPIODirModeSet(GPIO_PORTF_BASE,GPIO_PIN_2,GPIO_DIR_MODE_OUT);  

    //UART
    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);
    SysCtlPeripheralEnable(SYSCTL_PERIPH_UART0);
    GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1);
    UARTConfigSetExpClk(UART0_BASE, SysCtlClockGet(), 9600,
    (UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE |
                   UART_CONFIG_PAR_NONE));
    IntEnable(INT_UART0);
    UARTIntEnable(UART0_BASE, UART_INT_RX | UART_INT_RT);
   
    IntPrioritySet(INT_UART0, 0x7F);
                
    IntPrioritySet(INT_GPIOB,0x80);
    IntMasterEnable();
    SysTickIntRegister(SysTickHandler);                  
    SysTickPeriodSet(SysCtlClockGet()/10000);   // 0.1ms
    SysTickIntEnable();
    waitTime = 0;                   // initialize
    waitTime2 = 0;
    SysTickEnable();
    while(1)
    {
 

    }
    
}

int zigbee_init(unsigned long baud)
{
    int result;

    charZigbee.TxQueueLength = 10;
    charZigbee.RxQueueLength = 20;
    charZigbee.QueueWait = 0;
    charZigbee.PortBase = UART2_BASE;

    result = prepare_device(&charZigbee);
    if(result){
        printf("Zigbee queue creation fail\n");
        return result;
    }
        
    SysCtlPeripheralEnable(SYSCTL_PERIPH_UART2);
    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOG);
    GPIOPinTypeUART(GPIO_PORTG_BASE, GPIO_PIN_0 | GPIO_PIN_1);

    UARTConfigSetExpClk(UART2_BASE, SysCtlClockGet(), baud,
                        (UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE |
                         UART_CONFIG_PAR_NONE));

    IntRegister(INT_UART2, zigbee_isr);
    
    UARTIntDisable(UART2_BASE, 0xFFFFFFFF);
    IntPrioritySet(INT_UART2,configKERNEL_INTERRUPT_PRIORITY);
    IntEnable(INT_UART2);
    UARTEnable(UART2_BASE);
    UARTFIFODisable(UART2_BASE);
    UARTIntEnable(UART2_BASE, UART_INT_TX | UART_INT_RX);
    
    return result;
}

void SysDelayTimerSetup(void)
{   

#ifdef DELAY_USE_INTERRUPTS
    /* This function will enable clocks for the DMTimer7 instance */
    DMTimer7ModuleClkConfig();

    /* Registering DMTimerIsr */
    IntRegister(SYS_INT_TINT7, DMTimerIsr);

    /* Set the priority */
    IntPrioritySet(SYS_INT_TINT7, 0, AINTC_HOSTINT_ROUTE_IRQ);

    /* Enable the system interrupt */
    IntSystemEnable(SYS_INT_TINT7);

    DMTimerCounterSet(SOC_DMTIMER_7_REGS, 0);

    /* Configure the DMTimer for Auto-reload and compare mode */
    DMTimerModeConfigure(SOC_DMTIMER_7_REGS, DMTIMER_ONESHOT_NOCMP_ENABLE);
#else
    DMTimer7ModuleClkConfig();

    DMTimerModeConfigure(SOC_DMTIMER_7_REGS, DMTIMER_ONESHOT_NOCMP_ENABLE);
#endif

}

/*
 * @brief Initialize MSP430.
 *
 * use 400us interrupt for SPI comms.  This lets us xmit our 24-byte message in 9.6
 * ms.  At the end, we use a 32us interrupt for SPI comms.  This is about as fast
 * as the MSP430 can read bytes from the buffer.  This double byte signals the end of the
 * message for synchronizing the two processors
 * @returns void
*/
void msp430Init(void) {
    // Set up the message index
    MSP430MessageIdx = 0;

    // Default expand0 to off
    expand0Disable();

	// timer 1a is used for the ir interrupt.  timer 1b is used for the MSP430 message interrupt
	//ir_init initializes the timer 1, so timer1 shouldn't be enabled and configured here

	//MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_TIMER1);
	//MAP_TimerConfigure(TIMER1_BASE, TIMER_CFG_16_BIT_PAIR | TIMER_CFG_A_PERIODIC | TIMER_CFG_B_ONE_SHOT);
    // end shared timer init code

    MAP_TimerIntEnable(TIMER1_BASE, TIMER_TIMB_TIMEOUT);
    MAP_TimerLoadSet(TIMER1_BASE, TIMER_B, MSP430_SPI_BYTE_PERIOD);
    MAP_TimerEnable(TIMER1_BASE, TIMER_B);

	// Enable the interrupt in the NVIC with the right priority for FreeRTOS
	IntPrioritySet(INT_TIMER1B, SYSTEM_INTERRUPT_PRIORITY);
    MAP_IntEnable(INT_TIMER1B);

    // Have a flag to show the first valid communication from the MSP430
    systemMSP430CommsValid = FALSE;

    // Set up normal operations between the MSP430 and the 8962
    systemMSP430Command = MSP430_CMD_COMMAND_NORMAL;

    checksumFailure = 0;
}

void confADC(){



	SysCtlPeripheralEnable(SYSCTL_PERIPH_ADC0);   // Habilita ADC0
	SysCtlPeripheralSleepEnable(SYSCTL_PERIPH_ADC0);
	ADCSequenceDisable(ADC0_BASE,0); // Deshabilita el secuenciador 1 del ADC0 para su configuracion


	HWREG(ADC0_BASE + ADC_O_PC) = (ADC_PC_SR_500K);	// usar en lugar de SysCtlADCSpeedSet
	ADCSequenceConfigure(ADC0_BASE, 0, ADC_TRIGGER_TIMER, 0);// Disparo de muestreo por instrucciones de Timer
	ADCHardwareOversampleConfigure(ADC0_BASE, 64); //SobreMuestreo de 64 muestras

	// Configuramos los 4 conversores del secuenciador 1 para muestreo del sensor de temperatura
	ADCSequenceStepConfigure(ADC0_BASE, 0, 0, ADC_CTL_CH0); //Sequencer Step 0: Samples Channel PE3
	ADCSequenceStepConfigure(ADC0_BASE, 0, 1, ADC_CTL_CH1); //Sequencer Step 1: Samples Channel PE2
	ADCSequenceStepConfigure(ADC0_BASE, 0, 2, ADC_CTL_CH2 | ADC_CTL_IE | ADC_CTL_END); //Sequencer Step 2: Samples Channel PE1

	IntPrioritySet(INT_ADC0SS0,5<<5);
	// Tras configurar el secuenciador, se vuelve a habilitar
	ADCSequenceEnable(ADC0_BASE, 0);
	//Asociamos la funcion a la interrupcion
	ADCIntRegister(ADC0_BASE, 0,ADCIntHandler);

	//Activamos las interrupciones
	ADCIntEnable(ADC0_BASE,0);


}

// *************** GPIO_SetInterruptTask *************** 					
void GPIO_SetInterruptTask( GPIO_PORT_T port, GPIO_PIN_T pins,
                            unsigned long int_type, unsigned long priority, 
							void (*task)( void ) )
{
	unsigned long port_base = GPIO_PortBase[port];

	// Set the interrupt task for the specified port and pins
	if     ( pins & 0x01 ) GPIO_PinISR[port][0] = task;
	else if( pins & 0x02 ) GPIO_PinISR[port][1] = task; 
	else if( pins & 0x04 ) GPIO_PinISR[port][2] = task;
	else if( pins & 0x08 ) GPIO_PinISR[port][3] = task;
	else if( pins & 0x10 ) GPIO_PinISR[port][4] = task;
	else if( pins & 0x20 ) GPIO_PinISR[port][5] = task;
	else if( pins & 0x40 ) GPIO_PinISR[port][6] = task;
	else if( pins & 0x80 ) GPIO_PinISR[port][7] = task;

	// Set the event type and priority, and clear the interrupt
	IntPrioritySet( GPIO_IntAssignment[port], priority );	 
	GPIOIntTypeSet( port_base, pins, int_type );
	GPIOPinIntClear( port_base, pins);

	// Enable interrupts
	IntEnable( GPIO_IntAssignment[port] );
 	GPIOPinIntEnable( port_base, pins );
}

int NwpRegisterInterruptHandler(P_EVENT_HANDLER InterruptHdl , void* pValue)    //do not know what to do with pValue
{

    if(InterruptHdl == NULL)
    {
        //De-register Interprocessor communication interrupt between App and NWP
        #ifdef SL_PLATFORM_MULTI_THREADED
          osi_InterruptDeRegister(INT_NWPIC);
        #else
        IntDisable(INT_NWPIC);
        IntUnregister(INT_NWPIC);
        IntPendClear(INT_NWPIC);
        #endif
        g_pHostIntHdl = NULL;
    }
    else
    {
          g_pHostIntHdl = InterruptHdl;
#if 0
          //Setting the 14th and 13th bit to '01' to make the HOST_IRQ edge triggered
          HWREG(0x4402E168) |= 0x2000;
#endif
          #ifdef SL_PLATFORM_MULTI_THREADED
          	 IntPendClear(INT_NWPIC);
             osi_InterruptRegister(INT_NWPIC, (P_OSI_INTR_ENTRY)HostIntHanlder,INT_PRIORITY_LVL_1);
          #else
              IntRegister(INT_NWPIC, HostIntHanlder);
              IntPrioritySet(INT_NWPIC, INT_PRIORITY_LVL_1);
              IntPendClear(INT_NWPIC);
              IntEnable(INT_NWPIC);
          #endif
    }

  return 0;
}

static void hal_init(void)
{
	 gSysClock = SysCtlClockFreqSet((SYSCTL_XTAL_25MHZ | SYSCTL_OSC_MAIN | SYSCTL_USE_PLL | SYSCTL_CFG_VCO_480), 120000000); 
	 //gSysClock = SysCtlClockFreqSet((SYSCTL_OSC_INT | SYSCTL_USE_PLL | SYSCTL_CFG_VCO_320), 120000000);
	
	 //SysCtlDeepSleep();
	
	 /*systick = 1ms*/
	 SysTickPeriodSet(gSysClock / 1000);
   SysTickEnable();
   SysTickIntEnable();
	
	 bsp_gpio_init();
	 uart_hal_init();
	
	 bsp_adc_init();
	 bsp_spi0_init();
	 bsp_timer0_init();
	 bsp_timer1_init();
	 bsp_bt_uart_init();
	 bsp_nad_app_uart_init();
   
	 //bsp_pwm1_init();
	 IntPrioritySet(FAULT_SYSTICK, SYSTICK_INT_PRIORITY);
	 IntMasterEnable();
}

void vSerialInit( void )
{
	/* Create the queue used to communicate between the UART ISR and the Comms
	Rx task. */
	xCommsQueue = xQueueCreate( commsRX_QUEUE_LEN, sizeof( char ) );

	/* Enable the UART.  GPIOA has already been initialised. */
	SysCtlPeripheralEnable(SYSCTL_PERIPH_UART0);

	/* Set GPIO A0 and A1 as peripheral function.  They are used to output the
	UART signals. */
	GPIODirModeSet( GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1, GPIO_DIR_MODE_HW );

	/* Configure the UART for 8-N-1 operation. */
	UARTConfigSetExpClk( UART0_BASE, SysCtlClockGet(), commsBAUD_RATE, UART_CONFIG_WLEN_8 | UART_CONFIG_PAR_NONE | UART_CONFIG_STOP_ONE );

	/* We dont want to use the fifo.  This is for test purposes to generate
	as many interrupts as possible. */
	HWREG( UART0_BASE + UART_O_LCR_H ) &= ~commsFIFO_SET;

	/* Enable both Rx and Tx interrupts. */
	HWREG( UART0_BASE + UART_O_IM ) |= ( UART_INT_TX | UART_INT_RX );
	IntPrioritySet( INT_UART0, configKERNEL_INTERRUPT_PRIORITY );
	IntEnable( INT_UART0 );
}

void adc_init_and_run(void){
	// Тактирование выбранного модуля АЦП.
	SysCtlPeripheralEnable(SYSCTL_PERIPH_ADCx);

	// Ожидание готовности выбранного модуля АЦП к настройке.
	while(!SysCtlPeripheralReady(SYSCTL_PERIPH_ADCx)) { }

	ADCHardwareOversampleConfigure(ADCx_BASE, 4);

	// Установка триггера выбранного буфера АЦП.
	ADCSequenceConfigure(ADCx_BASE, SSy, ADC_TRIGGER, 0);

	ADCSequenceStepConfigure(ADCx_BASE, SSy, 0, ADC_CTL_CH0);
	ADCSequenceStepConfigure(
		ADCx_BASE, SSy, 1, ADC_CTL_CH1|ADC_CTL_IE|ADC_CTL_END
	);

	ADCIntClear(ADCx_BASE, SSy);

	IntEnable(INT_ADCxSSy);
	IntPrioritySet(INT_ADCxSSy, 1);

	ADCSequenceEnable(ADCx_BASE, SSy);
	ADCProcessorTrigger(ADCx_BASE, SSy);
}

void vSetupHighFrequencyTimer( void )
{
unsigned long ulFrequency;

	/* Timer zero is used to generate the interrupts, and timer 1 is used
	to measure the jitter. */
	SysCtlPeripheralEnable( SYSCTL_PERIPH_TIMER0 );
    SysCtlPeripheralEnable( SYSCTL_PERIPH_TIMER1 );
    TimerConfigure( TIMER0_BASE, TIMER_CFG_32_BIT_PER );
    TimerConfigure( TIMER1_BASE, TIMER_CFG_32_BIT_PER );

	/* Set the timer interrupt to be above the kernel - highest. */
	IntPrioritySet( INT_TIMER0A, timerHIGHEST_PRIORITY );

	/* Just used to measure time. */
    TimerLoadSet(TIMER1_BASE, TIMER_A, timerMAX_32BIT_VALUE );

	/* Ensure interrupts do not start until the scheduler is running. */
	portDISABLE_INTERRUPTS();

	/* The rate at which the timer will interrupt. */
	ulFrequency = configCPU_CLOCK_HZ / timerINTERRUPT_FREQUENCY;
    TimerLoadSet( TIMER0_BASE, TIMER_A, ulFrequency );
    IntEnable( INT_TIMER0A );
    TimerIntEnable( TIMER0_BASE, TIMER_TIMA_TIMEOUT );

	/* Enable both timers. */
    TimerEnable( TIMER0_BASE, TIMER_A );
    TimerEnable( TIMER1_BASE, TIMER_A );
}