本文整理汇总了C++中clk_enable函数 的典型用法代码示例。如果您正苦于以下问题:C++ clk_enable函数的具体用法?C++ clk_enable怎么用?C++ clk_enable使用的例子?那么恭喜您, 这里精选的函数代码示例或许可以为您提供帮助。
在下文中一共展示了clk_enable函数 的20个代码示例,这些例子默认根据受欢迎程度排序。您可以为喜欢或者感觉有用的代码点赞,您的评价将有助于我们的系统推荐出更棒的C++代码示例。
示例1: r_tpu_enable
static int r_tpu_enable(struct r_tpu_priv *p, enum led_brightness brightness)
{
struct led_renesas_tpu_config *cfg = p->pdev->dev.platform_data;
int prescaler[] = { 1, 4, 16, 64 };
int k, ret;
unsigned long rate, tmp;
if (p->timer_state == R_TPU_TIMER_ON)
return 0;
/* wake up device and enable clock */
pm_runtime_get_sync(&p->pdev->dev);
ret = clk_enable(p->clk);
if (ret) {
dev_err(&p->pdev->dev, "cannot enable clock\n");
return ret;
}
/* make sure channel is disabled */
r_tpu_start_stop_ch(p, 0);
/* get clock rate after enabling it */
rate = clk_get_rate(p->clk);
/* pick the lowest acceptable rate */
for (k = 0; k < ARRAY_SIZE(prescaler); k++)
if ((rate / prescaler[k]) < p->min_rate)
break;
if (!k) {
dev_err(&p->pdev->dev, "clock rate mismatch\n");
goto err0;
}
dev_dbg(&p->pdev->dev, "rate = %lu, prescaler %u\n",
rate, prescaler[k - 1]);
/* clear TCNT on TGRB match, count on rising edge, set prescaler */
r_tpu_write(p, TCR, 0x0040 | (k - 1));
/* output 0 until TGRA, output 1 until TGRB */
r_tpu_write(p, TIOR, 0x0002);
rate /= prescaler[k - 1] * p->refresh_rate;
r_tpu_write(p, TGRB, rate);
dev_dbg(&p->pdev->dev, "TRGB = 0x%04lx\n", rate);
tmp = (cfg->max_brightness - brightness) * rate;
r_tpu_write(p, TGRA, tmp / cfg->max_brightness);
dev_dbg(&p->pdev->dev, "TRGA = 0x%04lx\n", tmp / cfg->max_brightness);
/* PWM mode */
r_tpu_write(p, TMDR, 0x0002);
/* enable channel */
r_tpu_start_stop_ch(p, 1);
p->timer_state = R_TPU_TIMER_ON;
return 0;
err0:
clk_disable(p->clk);
pm_runtime_put_sync(&p->pdev->dev);
return -ENOTSUPP;
}
开发者ID:0xroot, 项目名称:Blackphone-BP1-Kernel, 代码行数:63, 代码来源:leds-renesas-tpu.c
示例2: snddev_icodec_open_rx
static int snddev_icodec_open_rx(struct snddev_icodec_state *icodec)
{
int trc;
int afe_channel_mode;
union afe_port_config afe_config;
struct snddev_icodec_drv_state *drv = &snddev_icodec_drv;
wake_lock(&drv->rx_idlelock);
if (drv->snddev_vreg) {
if (!strcmp(icodec->data->name, "headset_stereo_rx"))
vreg_mode_vote(drv->snddev_vreg, 1,
SNDDEV_LOW_POWER_MODE);
else
vreg_mode_vote(drv->snddev_vreg, 1,
SNDDEV_HIGH_POWER_MODE);
}
msm_snddev_rx_mclk_request();
drv->rx_osrclk = clk_get(0, "i2s_spkr_osr_clk");
if (IS_ERR(drv->rx_osrclk))
pr_err("%s master clock Error\n", __func__);
trc = clk_set_rate(drv->rx_osrclk,
SNDDEV_ICODEC_CLK_RATE(icodec->sample_rate));
//(+)dragonball
printk("SNDDEV_ICODEC_CLK_RATE(icodec->sample_rate)=>%d",icodec->sample_rate);
if (IS_ERR_VALUE(trc)) {
pr_err("ERROR setting m clock1\n");
goto error_invalid_freq;
}
clk_enable(drv->rx_osrclk);
drv->rx_bitclk = clk_get(0, "i2s_spkr_bit_clk");
if (IS_ERR(drv->rx_bitclk))
pr_err("%s clock Error\n", __func__);
/* Master clock = Sample Rate * OSR rate bit clock
* OSR Rate bit clock = bit/sample * channel master
* clock / bit clock = divider value = 8
*/
if (msm_codec_i2s_slave_mode) {
pr_info("%s: configuring bit clock for slave mode\n",
__func__);
trc = clk_set_rate(drv->rx_bitclk, 0);
} else
trc = clk_set_rate(drv->rx_bitclk, 8);
if (IS_ERR_VALUE(trc)) {
pr_err("ERROR setting m clock1\n");
goto error_adie;
}
clk_enable(drv->rx_bitclk);
if (icodec->data->voltage_on)
icodec->data->voltage_on();
/* Configure ADIE */
trc = adie_codec_open(icodec->data->profile, &icodec->adie_path);
if (IS_ERR_VALUE(trc))
pr_err("%s: adie codec open failed\n", __func__);
else
adie_codec_setpath(icodec->adie_path,
icodec->sample_rate, 256);
/* OSR default to 256, can be changed for power optimization
* If OSR is to be changed, need clock API for setting the divider
*/
//(+)dragonball
printk("adie_codec_open::profile=>%s,adie_path=>%s ",icodec->data->profile,icodec->adie_path );
switch (icodec->data->channel_mode) {
case 2:
afe_channel_mode = MSM_AFE_STEREO;
break;
case 1:
default:
afe_channel_mode = MSM_AFE_MONO;
break;
}
afe_config.mi2s.channel = afe_channel_mode;
afe_config.mi2s.bitwidth = 16;
afe_config.mi2s.line = 1;
if (msm_codec_i2s_slave_mode)
afe_config.mi2s.ws = 0;
else
afe_config.mi2s.ws = 1;
trc = afe_open(icodec->data->copp_id, &afe_config, icodec->sample_rate);
if (IS_ERR_VALUE(trc))
pr_err("%s: afe open failed, trc = %d\n", __func__, trc);
/* Enable ADIE */
if (icodec->adie_path) {
adie_codec_proceed_stage(icodec->adie_path,
ADIE_CODEC_DIGITAL_READY);
adie_codec_proceed_stage(icodec->adie_path,
ADIE_CODEC_DIGITAL_ANALOG_READY);
}
//.........这里部分代码省略.........
开发者ID:gnychis, 项目名称:sgs2-skyrocket-kernel, 代码行数:101, 代码来源:snddev_icodec.c
示例3: tegra_asoc_utils_init
int tegra_asoc_utils_init(struct tegra_asoc_utils_data *data,
struct device *dev)
{
int ret;
int rate;
data->dev = dev;
data->clk_pll_p_out1 = clk_get_sys(NULL, "pll_p_out1");
if (IS_ERR(data->clk_pll_p_out1)) {
dev_err(data->dev, "Can't retrieve clk pll_p_out1\n");
ret = PTR_ERR(data->clk_pll_p_out1);
goto err;
}
data->clk_pll_a = clk_get_sys(NULL, "pll_a");
if (IS_ERR(data->clk_pll_a)) {
dev_err(data->dev, "Can't retrieve clk pll_a\n");
ret = PTR_ERR(data->clk_pll_a);
goto err_put_pll_p_out1;
}
data->clk_pll_a_out0 = clk_get_sys(NULL, "pll_a_out0");
if (IS_ERR(data->clk_pll_a_out0)) {
dev_err(data->dev, "Can't retrieve clk pll_a_out0\n");
ret = PTR_ERR(data->clk_pll_a_out0);
goto err_put_pll_a;
}
data->clk_m = clk_get_sys(NULL, "clk_m");
if (IS_ERR(data->clk_m)) {
dev_err(data->dev, "Can't retrieve clk clk_m\n");
ret = PTR_ERR(data->clk_m);
goto err;
}
#if defined(CONFIG_ARCH_TEGRA_2x_SOC)
data->clk_cdev1 = clk_get_sys(NULL, "cdev1");
#else
data->clk_cdev1 = clk_get_sys("extern1", NULL);
#endif
if (IS_ERR(data->clk_cdev1)) {
dev_err(data->dev, "Can't retrieve clk cdev1\n");
ret = PTR_ERR(data->clk_cdev1);
goto err_put_pll_a_out0;
}
#if defined(CONFIG_ARCH_TEGRA_2x_SOC)
data->clk_out1 = ERR_PTR(-ENOENT);
#else
data->clk_out1 = clk_get_sys("clk_out_1", "extern1");
if (IS_ERR(data->clk_out1)) {
dev_err(data->dev, "Can't retrieve clk out1\n");
ret = PTR_ERR(data->clk_out1);
goto err_put_cdev1;
}
#endif
#if !defined(CONFIG_ARCH_TEGRA_2x_SOC)
#if TEGRA30_I2S_MASTER_PLAYBACK
ret = clk_set_parent(data->clk_cdev1, data->clk_pll_a_out0);
if (ret) {
dev_err(data->dev, "Can't set clk cdev1/extern1 parent");
goto err_put_out1;
}
#else
rate = clk_get_rate(data->clk_m);
if(rate == 26000000)
clk_set_rate(data->clk_cdev1, 13000000);
ret = clk_set_parent(data->clk_cdev1, data->clk_m);
if (ret) {
dev_err(data->dev, "Can't set clk cdev1/extern1 parent");
goto err_put_out1;
}
#endif
#endif
#if 0 //remove clk_enable clk_cdev1, move it to fm34.c enable
ret = clk_enable(data->clk_cdev1);
if (ret) {
dev_err(data->dev, "Can't enable clk cdev1/extern1");
goto err_put_out1;
}
#endif
if (!IS_ERR(data->clk_out1)) {
ret = clk_enable(data->clk_out1);
if (ret) {
dev_err(data->dev, "Can't enable clk out1");
goto err_put_out1;
}
}
ret = tegra_asoc_utils_set_rate(data, 48000, 256 * 48000);
if (ret)
goto err_put_out1;
return 0;
//.........这里部分代码省略.........
开发者ID:TheMeddlingMonk, 项目名称:android_kernel_toshiba_tostab03, 代码行数:101, 代码来源:tegra_asoc_utils.c
示例4: apollon_init_smc91x
static inline void __init apollon_init_smc91x(void)
{
unsigned long base;
unsigned int rate;
struct clk *gpmc_fck;
int eth_cs;
int err;
gpmc_fck = clk_get(NULL, "gpmc_fck"); /* Always on ENABLE_ON_INIT */
if (IS_ERR(gpmc_fck)) {
WARN_ON(1);
return;
}
clk_enable(gpmc_fck);
rate = clk_get_rate(gpmc_fck);
eth_cs = APOLLON_ETH_CS;
/* Make sure CS1 timings are correct */
gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG1, 0x00011200);
if (rate >= 160000000) {
gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG2, 0x001f1f01);
gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG3, 0x00080803);
gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG4, 0x1c0b1c0a);
gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG5, 0x041f1F1F);
gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG6, 0x000004C4);
} else if (rate >= 130000000) {
gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG2, 0x001f1f00);
gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG3, 0x00080802);
gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG4, 0x1C091C09);
gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG5, 0x041f1F1F);
gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG6, 0x000004C4);
} else {/* rate = 100000000 */
gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG2, 0x001f1f00);
gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG3, 0x00080802);
gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG4, 0x1C091C09);
gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG5, 0x031A1F1F);
gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG6, 0x000003C2);
}
if (gpmc_cs_request(APOLLON_ETH_CS, SZ_16M, &base) < 0) {
printk(KERN_ERR "Failed to request GPMC CS for smc91x\n");
goto out;
}
apollon_smc91x_resources[0].start = base + 0x300;
apollon_smc91x_resources[0].end = base + 0x30f;
udelay(100);
omap_mux_init_gpio(APOLLON_ETHR_GPIO_IRQ, 0);
err = gpio_request_one(APOLLON_ETHR_GPIO_IRQ, GPIOF_IN, "SMC91x irq");
if (err) {
printk(KERN_ERR "Failed to request GPIO%d for smc91x IRQ\n",
APOLLON_ETHR_GPIO_IRQ);
gpmc_cs_free(APOLLON_ETH_CS);
}
out:
clk_disable(gpmc_fck);
clk_put(gpmc_fck);
}
开发者ID:CSCLOG, 项目名称:beaglebone, 代码行数:62, 代码来源:board-apollon.c
示例5: vpif_resume
static int vpif_resume(struct device *dev)
{
clk_enable(vpif_clk);
return 0;
}
开发者ID:AllenDou, 项目名称:linux, 代码行数:5, 代码来源:vpif.c
示例6: res_trk_enable_videocore
static u32 res_trk_enable_videocore(void)
{
mutex_lock(&resource_context.lock);
if (!resource_context.rail_enabled) {
int rc = -1;
rc = regulator_enable(resource_context.regulator);
if (rc) {
VCDRES_MSG_ERROR("%s(): regulator_enable failed %d\n",
__func__, rc);
goto bail_out;
}
VCDRES_MSG_LOW("%s(): regulator enable Success %d\n",
__func__, rc);
resource_context.pclk = clk_get(resource_context.device,
"iface_clk");
if (IS_ERR(resource_context.pclk)) {
VCDRES_MSG_ERROR("%s(): iface_clk get failed\n"
, __func__);
goto disable_regulator;
}
resource_context.hclk = clk_get(resource_context.device,
"core_clk");
if (IS_ERR(resource_context.hclk)) {
VCDRES_MSG_ERROR("%s(): core_clk get failed\n"
, __func__);
goto release_pclk;
}
resource_context.hclk_div2 =
clk_get(resource_context.device, "core_div2_clk");
if (IS_ERR(resource_context.hclk_div2)) {
VCDRES_MSG_ERROR("%s(): core_div2_clk get failed\n"
, __func__);
goto release_hclk_pclk;
}
if (clk_set_rate(resource_context.hclk,
mfc_clk_freq_table[0])) {
VCDRES_MSG_ERROR("\n pwr_rail_enable:"
" set clk rate failed\n");
goto release_all_clks;
}
if (clk_enable(resource_context.pclk)) {
VCDRES_MSG_ERROR("vidc pclk Enable failed\n");
goto release_all_clks;
}
if (clk_enable(resource_context.hclk)) {
VCDRES_MSG_ERROR("vidc hclk Enable failed\n");
goto disable_pclk;
}
if (clk_enable(resource_context.hclk_div2)) {
VCDRES_MSG_ERROR("vidc hclk_div2 Enable failed\n");
goto disable_hclk_pclk;
}
rc = clk_reset(resource_context.pclk, CLK_RESET_DEASSERT);
if (rc) {
VCDRES_MSG_ERROR("\n clk_reset failed %d\n", rc);
goto disable_and_release_all_clks;
}
msleep(20);
clk_disable(resource_context.pclk);
clk_disable(resource_context.hclk);
clk_disable(resource_context.hclk_div2);
}
resource_context.rail_enabled = 1;
mutex_unlock(&resource_context.lock);
return true;
disable_and_release_all_clks:
clk_disable(resource_context.hclk_div2);
disable_hclk_pclk:
clk_disable(resource_context.hclk);
disable_pclk:
clk_disable(resource_context.pclk);
release_all_clks:
clk_put(resource_context.hclk_div2);
resource_context.hclk_div2 = NULL;
release_hclk_pclk:
clk_put(resource_context.hclk);
resource_context.hclk = NULL;
release_pclk:
clk_put(resource_context.pclk);
resource_context.pclk = NULL;
disable_regulator:
regulator_disable(resource_context.regulator);
bail_out:
mutex_unlock(&resource_context.lock);
//.........这里部分代码省略.........
开发者ID:mifl, 项目名称:android_kernel_pantech_msm8660-common, 代码行数:101, 代码来源:vcd_res_tracker.c
示例7: hdmi_streamon
static int hdmi_streamon(struct hdmi_device *hdev)
{
struct device *dev = hdev->dev;
struct hdmi_resources *res = &hdev->res;
int ret, tries;
dev_dbg(dev, "%s\n", __func__);
hdev->streaming = 1;
ret = v4l2_subdev_call(hdev->phy_sd, video, s_stream, 1);
if (ret)
return ret;
/* waiting for HDMIPHY's PLL to get to steady state */
for (tries = 100; tries; --tries) {
if (is_hdmiphy_ready(hdev))
break;
mdelay(1);
}
/* steady state not achieved */
if (tries == 0) {
dev_err(dev, "hdmiphy's pll could not reach steady state.\n");
v4l2_subdev_call(hdev->phy_sd, video, s_stream, 0);
hdmi_dumpregs(hdev, "s_stream");
return -EIO;
}
/* hdmiphy clock is used for HDMI in streaming mode */
clk_disable(res->sclk_hdmi);
clk_set_parent(res->sclk_hdmi, res->sclk_hdmiphy);
clk_enable(res->sclk_hdmi);
/* 3D test */
hdmi_set_infoframe(hdev);
/* set packets for audio */
hdmi_set_packets(hdev);
/* init audio */
#if defined(CONFIG_VIDEO_EXYNOS_HDMI_AUDIO_I2S)
hdmi_reg_i2s_audio_init(hdev);
#elif defined(CONFIG_VIDEO_EXYNOS_HDMI_AUDIO_SPDIF)
hdmi_reg_spdif_audio_init(hdev);
#endif
/* enbale HDMI audio */
if (hdev->audio_enable)
hdmi_audio_enable(hdev, 1);
/* enable HDMI and timing generator */
hdmi_enable(hdev, 1);
hdmi_tg_enable(hdev, 1);
/* start HDCP if enabled */
if (hdev->hdcp_info.hdcp_enable) {
ret = hdcp_start(hdev);
if (ret)
return ret;
}
hdmi_dumpregs(hdev, "streamon");
return 0;
}
开发者ID:amuxtux, 项目名称:exynos4210, 代码行数:63, 代码来源:hdmi_drv.c
示例8: hdmi_probe
static int __devinit hdmi_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct resource *res;
struct i2c_adapter *phy_adapter;
struct hdmi_device *hdmi_dev = NULL;
struct hdmi_driver_data *drv_data;
int ret;
unsigned int irq_type;
dev_dbg(dev, "probe start\n");
hdmi_dev = kzalloc(sizeof(*hdmi_dev), GFP_KERNEL);
if (!hdmi_dev) {
dev_err(dev, "out of memory\n");
ret = -ENOMEM;
goto fail;
}
hdmi_dev->dev = dev;
ret = hdmi_resources_init(hdmi_dev);
if (ret)
goto fail_hdev;
/* mapping HDMI registers */
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (res == NULL) {
dev_err(dev, "get memory resource failed.\n");
ret = -ENXIO;
goto fail_init;
}
hdmi_dev->regs = ioremap(res->start, resource_size(res));
if (hdmi_dev->regs == NULL) {
dev_err(dev, "register mapping failed.\n");
ret = -ENXIO;
goto fail_hdev;
}
/* External hpd */
res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
if (res == NULL) {
dev_err(dev, "get external interrupt resource failed.\n");
ret = -ENXIO;
goto fail_regs;
}
hdmi_dev->ext_irq = res->start;
/* Internal hpd */
res = platform_get_resource(pdev, IORESOURCE_IRQ, 1);
if (res == NULL) {
dev_err(dev, "get internal interrupt resource failed.\n");
ret = -ENXIO;
goto fail_regs;
}
hdmi_dev->int_irq = res->start;
/* workqueue for HPD */
hdmi_dev->hpd_wq = create_workqueue("hdmi-hpd");
if (hdmi_dev->hpd_wq == NULL)
ret = -ENXIO;
INIT_WORK(&hdmi_dev->hpd_work, s5p_hpd_kobject_uevent);
/* setting v4l2 name to prevent WARN_ON in v4l2_device_register */
strlcpy(hdmi_dev->v4l2_dev.name, dev_name(dev),
sizeof(hdmi_dev->v4l2_dev.name));
/* passing NULL owner prevents driver from erasing drvdata */
ret = v4l2_device_register(NULL, &hdmi_dev->v4l2_dev);
if (ret) {
dev_err(dev, "could not register v4l2 device.\n");
goto fail_regs;
}
drv_data = (struct hdmi_driver_data *)
platform_get_device_id(pdev)->driver_data;
dev_info(dev, "hdmiphy i2c bus number = %d\n", drv_data->hdmiphy_bus);
phy_adapter = i2c_get_adapter(drv_data->hdmiphy_bus);
if (phy_adapter == NULL) {
dev_err(dev, "adapter request failed\n");
ret = -ENXIO;
goto fail_vdev;
}
hdmi_dev->phy_sd = v4l2_i2c_new_subdev_board(&hdmi_dev->v4l2_dev,
phy_adapter, &hdmiphy_info, NULL);
/* on failure or not adapter is no longer useful */
i2c_put_adapter(phy_adapter);
if (hdmi_dev->phy_sd == NULL) {
dev_err(dev, "missing subdev for hdmiphy\n");
ret = -ENODEV;
goto fail_vdev;
}
/* HDMI PHY power off
* HDMI PHY is on as default configuration
* So, HDMI PHY must be turned off if it's not used */
clk_enable(hdmi_dev->res.hdmiphy);
v4l2_subdev_call(hdmi_dev->phy_sd, core, s_power, 0);
//.........这里部分代码省略.........
开发者ID:amuxtux, 项目名称:exynos4210, 代码行数:101, 代码来源:hdmi_drv.c
示例9: s3cfb_probe
static int s3cfb_probe(struct platform_device *pdev)
{
struct s3c_platform_fb *pdata;
struct resource *res;
int ret = 0;
/* initialzing global structure */
ctrl = kzalloc(sizeof(struct s3cfb_global), GFP_KERNEL);
if (!ctrl) {
dev_err(ctrl->dev, "failed to allocate for global fb structure\n");
goto err_global;
}
ctrl->dev = &pdev->dev;
s3cfb_set_lcd_info(ctrl);
/* gpio */
pdata = to_fb_plat(&pdev->dev);
if (pdata->cfg_gpio)
pdata->cfg_gpio(pdev);
/* clock */
ctrl->clock = clk_get(&pdev->dev, pdata->clk_name);
if (IS_ERR(ctrl->clock)) {
dev_err(ctrl->dev, "failed to get fimd clock source\n");
ret = -EINVAL;
goto err_clk;
}
clk_enable(ctrl->clock);
/* io memory */
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!res) {
dev_err(ctrl->dev, "failed to get io memory region\n");
ret = -EINVAL;
goto err_io;
}
/* request mem region */
res = request_mem_region(res->start,
res->end - res->start + 1, pdev->name);
if (!res) {
dev_err(ctrl->dev, "failed to request io memory region\n");
ret = -EINVAL;
goto err_io;
}
/* ioremap for register block */
ctrl->regs = ioremap(res->start, res->end - res->start + 1);
if (!ctrl->regs) {
dev_err(ctrl->dev, "failed to remap io region\n");
ret = -EINVAL;
goto err_io;
}
/* irq */
ctrl->irq = platform_get_irq(pdev, 0);
if (request_irq(ctrl->irq, s3cfb_irq_frame, IRQF_DISABLED,
pdev->name, ctrl)) {
dev_err(ctrl->dev, "request_irq failed\n");
ret = -EINVAL;
goto err_irq;
}
#ifdef CONFIG_FB_S3C_V2_TRACE_UNDERRUN
if (request_irq(platform_get_irq(pdev, 1), s3cfb_irq_fifo,
IRQF_DISABLED, pdev->name, ctrl)) {
dev_err(ctrl->dev, "request_irq failed\n");
ret = -EINVAL;
goto err_irq;
}
s3cfb_set_fifo_interrupt(ctrl, 1);
dev_info(ctrl->dev, "fifo underrun trace\n");
#endif
/* init global */
s3cfb_init_global();
s3cfb_display_on(ctrl);
/* panel control */
if (pdata->backlight_on)
pdata->backlight_on(pdev);
if (pdata->lcd_on)
pdata->lcd_on(pdev);
if (ctrl->lcd->init_ldi)
ctrl->lcd->init_ldi();
/* prepare memory */
if (s3cfb_alloc_framebuffer())
goto err_alloc;
if (s3cfb_register_framebuffer())
goto err_alloc;
s3cfb_set_clock(ctrl);
s3cfb_enable_window(pdata->default_win);
//.........这里部分代码省略.........
开发者ID:FrozenData, 项目名称:SGS2-Kernel-Update2, 代码行数:101, 代码来源:s3cfb2.c
示例10: mfc_open
static int mfc_open(struct inode *inode, struct file *file)
{
struct mfc_inst_ctx *mfc_ctx;
int ret;
mutex_lock(&mfc_mutex);
if (!mfc_is_running()) {
/* Turn on mfc power domain regulator */
ret = regulator_enable(mfc_pd_regulator);
if (ret < 0) {
mfc_err("MFC_RET_POWER_ENABLE_FAIL\n");
ret = -EINVAL;
goto err_open;
}
clk_enable(mfc_sclk);
mfc_load_firmware(mfc_fw_info->data, mfc_fw_info->size);
if (mfc_init_hw() != true) {
clk_disable(mfc_sclk);
ret = -ENODEV;
goto err_regulator;
}
clk_disable(mfc_sclk);
}
mfc_ctx = (struct mfc_inst_ctx *)kmalloc(sizeof(struct mfc_inst_ctx), GFP_KERNEL);
if (mfc_ctx == NULL) {
mfc_err("MFCINST_MEMORY_ALLOC_FAIL\n");
ret = -ENOMEM;
goto err_regulator;
}
memset(mfc_ctx, 0, sizeof(struct mfc_inst_ctx));
/* get the inst no allocating some part of memory among reserved memory */
mfc_ctx->mem_inst_no = mfc_get_mem_inst_no();
mfc_ctx->InstNo = -1;
if (mfc_ctx->mem_inst_no < 0) {
mfc_err("MFCINST_INST_NUM_EXCEEDED\n");
ret = -EPERM;
goto err_mem_inst;
}
if (mfc_set_state(mfc_ctx, MFCINST_STATE_OPENED) < 0) {
mfc_err("MFCINST_ERR_STATE_INVALID\n");
ret = -ENODEV;
goto err_set_state;
}
/* Decoder only */
mfc_ctx->extraDPB = MFC_MAX_EXTRA_DPB;
mfc_ctx->FrameType = MFC_RET_FRAME_NOT_SET;
file->private_data = mfc_ctx;
mutex_unlock(&mfc_mutex);
return 0;
err_set_state:
mfc_return_mem_inst_no(mfc_ctx->mem_inst_no);
err_mem_inst:
kfree(mfc_ctx);
err_regulator:
if (!mfc_is_running()) {
/* Turn off mfc power domain regulator */
ret = regulator_disable(mfc_pd_regulator);
if (ret < 0)
mfc_err("MFC_RET_POWER_DISABLE_FAIL\n");
}
err_open:
mutex_unlock(&mfc_mutex);
return ret;
}
开发者ID:mdo-rom, 项目名称:platform_kernel_samsung_crespo, 代码行数:78, 代码来源:mfc.c
示例11: mfc_ioctl
static long mfc_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
{
int ret, ex_ret;
struct mfc_inst_ctx *mfc_ctx = NULL;
struct mfc_common_args in_param;
mutex_lock(&mfc_mutex);
clk_enable(mfc_sclk);
ret = copy_from_user(&in_param, (struct mfc_common_args *)arg, sizeof(struct mfc_common_args));
if (ret < 0) {
mfc_err("Inparm copy error\n");
ret = -EIO;
in_param.ret_code = MFCINST_ERR_INVALID_PARAM;
goto out_ioctl;
}
mfc_ctx = (struct mfc_inst_ctx *)file->private_data;
mutex_unlock(&mfc_mutex);
switch (cmd) {
case IOCTL_MFC_ENC_INIT:
mutex_lock(&mfc_mutex);
if (mfc_set_state(mfc_ctx, MFCINST_STATE_ENC_INITIALIZE) < 0) {
mfc_err("MFCINST_ERR_STATE_INVALID\n");
in_param.ret_code = MFCINST_ERR_STATE_INVALID;
ret = -EINVAL;
mutex_unlock(&mfc_mutex);
break;
}
/* MFC encode init */
in_param.ret_code = mfc_init_encode(mfc_ctx, &(in_param.args));
ret = in_param.ret_code;
mutex_unlock(&mfc_mutex);
break;
case IOCTL_MFC_ENC_EXE:
mutex_lock(&mfc_mutex);
if (mfc_ctx->MfcState < MFCINST_STATE_ENC_INITIALIZE) {
mfc_err("MFCINST_ERR_STATE_INVALID\n");
in_param.ret_code = MFCINST_ERR_STATE_INVALID;
ret = -EINVAL;
mutex_unlock(&mfc_mutex);
break;
}
if (mfc_set_state(mfc_ctx, MFCINST_STATE_ENC_EXE) < 0) {
mfc_err("MFCINST_ERR_STATE_INVALID\n");
in_param.ret_code = MFCINST_ERR_STATE_INVALID;
ret = -EINVAL;
mutex_unlock(&mfc_mutex);
break;
}
in_param.ret_code = mfc_exe_encode(mfc_ctx, &(in_param.args));
ret = in_param.ret_code;
mutex_unlock(&mfc_mutex);
break;
case IOCTL_MFC_DEC_INIT:
mutex_lock(&mfc_mutex);
if (mfc_set_state(mfc_ctx, MFCINST_STATE_DEC_INITIALIZE) < 0) {
mfc_err("MFCINST_ERR_STATE_INVALID\n");
in_param.ret_code = MFCINST_ERR_STATE_INVALID;
ret = -EINVAL;
mutex_unlock(&mfc_mutex);
break;
}
/* MFC decode init */
in_param.ret_code = mfc_init_decode(mfc_ctx, &(in_param.args));
if (in_param.ret_code < 0) {
ret = in_param.ret_code;
mutex_unlock(&mfc_mutex);
break;
}
if (in_param.args.dec_init.out_dpb_cnt <= 0) {
mfc_err("MFC out_dpb_cnt error\n");
mutex_unlock(&mfc_mutex);
break;
}
mutex_unlock(&mfc_mutex);
break;
case IOCTL_MFC_DEC_EXE:
mutex_lock(&mfc_mutex);
if (mfc_ctx->MfcState < MFCINST_STATE_DEC_INITIALIZE) {
mfc_err("MFCINST_ERR_STATE_INVALID\n");
in_param.ret_code = MFCINST_ERR_STATE_INVALID;
ret = -EINVAL;
mutex_unlock(&mfc_mutex);
break;
}
if (mfc_set_state(mfc_ctx, MFCINST_STATE_DEC_EXE) < 0) {
mfc_err("MFCINST_ERR_STATE_INVALID\n");
//.........这里部分代码省略.........
开发者ID:mdo-rom, 项目名称:platform_kernel_samsung_crespo, 代码行数:101, 代码来源:mfc.c
示例12: omap2_enter_full_retention
static int omap2_enter_full_retention(void)
{
u32 l;
/* There is 1 reference hold for all children of the oscillator
* clock, the following will remove it. If no one else uses the
* oscillator itself it will be disabled if/when we enter retention
* mode.
*/
clk_disable(osc_ck);
/* Clear old wake-up events */
/* REVISIT: These write to reserved bits? */
omap2_prm_write_mod_reg(0xffffffff, CORE_MOD, PM_WKST1);
omap2_prm_write_mod_reg(0xffffffff, CORE_MOD, OMAP24XX_PM_WKST2);
omap2_prm_write_mod_reg(0xffffffff, WKUP_MOD, PM_WKST);
/*
* Set MPU powerdomain's next power state to RETENTION;
* preserve logic state during retention
*/
pwrdm_set_logic_retst(mpu_pwrdm, PWRDM_POWER_RET);
pwrdm_set_next_pwrst(mpu_pwrdm, PWRDM_POWER_RET);
/* Workaround to kill USB */
l = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0) | OMAP24XX_USBSTANDBYCTRL;
omap_ctrl_writel(l, OMAP2_CONTROL_DEVCONF0);
omap2_gpio_prepare_for_idle(0);
/* One last check for pending IRQs to avoid extra latency due
* to sleeping unnecessarily. */
if (omap_irq_pending())
goto no_sleep;
/* Jump to SRAM suspend code */
omap2_sram_suspend(sdrc_read_reg(SDRC_DLLA_CTRL),
OMAP_SDRC_REGADDR(SDRC_DLLA_CTRL),
OMAP_SDRC_REGADDR(SDRC_POWER));
no_sleep:
omap2_gpio_resume_after_idle();
clk_enable(osc_ck);
/* clear CORE wake-up events */
omap2_prm_write_mod_reg(0xffffffff, CORE_MOD, PM_WKST1);
omap2_prm_write_mod_reg(0xffffffff, CORE_MOD, OMAP24XX_PM_WKST2);
/* wakeup domain events - bit 1: GPT1, bit5 GPIO */
omap2_prm_clear_mod_reg_bits(0x4 | 0x1, WKUP_MOD, PM_WKST);
/* MPU domain wake events */
l = omap2_prm_read_mod_reg(OCP_MOD, OMAP2_PRCM_IRQSTATUS_MPU_OFFSET);
if (l & 0x01)
omap2_prm_write_mod_reg(0x01, OCP_MOD,
OMAP2_PRCM_IRQSTATUS_MPU_OFFSET);
if (l & 0x20)
omap2_prm_write_mod_reg(0x20, OCP_MOD,
OMAP2_PRCM_IRQSTATUS_MPU_OFFSET);
/* Mask future PRCM-to-MPU interrupts */
omap2_prm_write_mod_reg(0x0, OCP_MOD, OMAP2_PRCM_IRQSTATUS_MPU_OFFSET);
return 0;
}
开发者ID:AceKatz, 项目名称:networking_research, 代码行数:66, 代码来源:pm24xx.c
示例13: do_mmc_init
static int do_mmc_init(int dev_index, bool removable)
{
struct mmc_host *host;
struct mmc *mmc;
#ifdef CONFIG_TEGRA186
int ret;
#endif
/* DT should have been read & host config filled in */
host = &mmc_host[dev_index];
if (!host->enabled)
return -1;
debug(" do_mmc_init: index %d, bus width %d pwr_gpio %d cd_gpio %d\n",
dev_index, host->width, gpio_get_number(&host->pwr_gpio),
gpio_get_number(&host->cd_gpio));
host->clock = 0;
#ifdef CONFIG_TEGRA186
ret = reset_assert(&host->reset_ctl);
if (ret)
return ret;
ret = clk_enable(&host->clk);
if (ret)
return ret;
ret = clk_set_rate(&host->clk, 20000000);
if (IS_ERR_VALUE(ret))
return ret;
ret = reset_deassert(&host->reset_ctl);
if (ret)
return ret;
#else
clock_start_periph_pll(host->mmc_id, CLOCK_ID_PERIPH, 20000000);
#endif
if (dm_gpio_is_valid(&host->pwr_gpio))
dm_gpio_set_value(&host->pwr_gpio, 1);
memset(&host->cfg, 0, sizeof(host->cfg));
host->cfg.name = "Tegra SD/MMC";
host->cfg.ops = &tegra_mmc_ops;
host->cfg.voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195;
host->cfg.host_caps = 0;
if (host->width == 8)
host->cfg.host_caps |= MMC_MODE_8BIT;
if (host->width >= 4)
host->cfg.host_caps |= MMC_MODE_4BIT;
host->cfg.host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
/*
* min freq is for card identification, and is the highest
* low-speed SDIO card frequency (actually 400KHz)
* max freq is highest HS eMMC clock as per the SD/MMC spec
* (actually 52MHz)
*/
host->cfg.f_min = 375000;
host->cfg.f_max = 48000000;
host->cfg.b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
mmc = mmc_create(&host->cfg, host);
mmc->block_dev.removable = removable;
if (mmc == NULL)
return -1;
return 0;
}
开发者ID:eesuda, 项目名称:u-boot, 代码行数:70, 代码来源:tegra_mmc.c
示例14: mv_u3d_phy_init
static int mv_u3d_phy_init(struct usb_phy *phy)
{
struct mv_u3d_phy *mv_u3d_phy;
void __iomem *base;
u32 val, count;
/* enable usb3 phy */
mv_u3d_phy = container_of(phy, struct mv_u3d_phy, phy);
if (mv_u3d_phy->clk)
clk_enable(mv_u3d_phy->clk);
base = mv_u3d_phy->base;
val = mv_u3d_phy_read(base, USB3_POWER_PLL_CONTROL);
val &= ~(USB3_POWER_PLL_CONTROL_PU_MASK);
val |= 0xF << USB3_POWER_PLL_CONTROL_PU_SHIFT;
mv_u3d_phy_write(base, USB3_POWER_PLL_CONTROL, val);
udelay(100);
mv_u3d_phy_write(base, USB3_RESET_CONTROL,
USB3_RESET_CONTROL_RESET_PIPE);
udelay(100);
mv_u3d_phy_write(base, USB3_RESET_CONTROL,
USB3_RESET_CONTROL_RESET_PIPE
| USB3_RESET_CONTROL_RESET_PHY);
udelay(100);
val = mv_u3d_phy_read(base, USB3_POWER_PLL_CONTROL);
val &= ~(USB3_POWER_PLL_CONTROL_REF_FREF_SEL_MASK
| USB3_POWER_PLL_CONTROL_PHY_MODE_MASK);
val |= (USB3_PLL_25MHZ << USB3_POWER_PLL_CONTROL_REF_FREF_SEL_SHIFT)
| (0x5 << USB3_POWER_PLL_CONTROL_PHY_MODE_SHIFT);
mv_u3d_phy_write(base, USB3_POWER_PLL_CONTROL, val);
udelay(100);
mv_u3d_phy_clear(base, USB3_KVCO_CALI_CONTROL,
USB3_KVCO_CALI_CONTROL_USE_MAX_PLL_RATE_MASK);
udelay(100);
val = mv_u3d_phy_read(base, USB3_SQUELCH_FFE);
val &= ~(USB3_SQUELCH_FFE_FFE_CAP_SEL_MASK
| USB3_SQUELCH_FFE_FFE_RES_SEL_MASK
| USB3_SQUELCH_FFE_SQ_THRESH_IN_MASK);
val |= ((0xD << USB3_SQUELCH_FFE_FFE_CAP_SEL_SHIFT)
| (0x7 << USB3_SQUELCH_FFE_FFE_RES_SEL_SHIFT)
| (0x8 << USB3_SQUELCH_FFE_SQ_THRESH_IN_SHIFT));
mv_u3d_phy_write(base, USB3_SQUELCH_FFE, val);
udelay(100);
val = mv_u3d_phy_read(base, USB3_GEN1_SET0);
val &= ~USB3_GEN1_SET0_G1_TX_SLEW_CTRL_EN_MASK;
val |= 1 << USB3_GEN1_SET0_G1_TX_EMPH_EN_SHIFT;
mv_u3d_phy_write(base, USB3_GEN1_SET0, val);
udelay(100);
val = mv_u3d_phy_read(base, USB3_GEN2_SET0);
val &= ~(USB3_GEN2_SET0_G2_TX_AMP_MASK
| USB3_GEN2_SET0_G2_TX_EMPH_AMP_MASK
| USB3_GEN2_SET0_G2_TX_SLEW_CTRL_EN_MASK);
val |= ((0x14 << USB3_GEN2_SET0_G2_TX_AMP_SHIFT)
| (1 << USB3_GEN2_SET0_G2_TX_AMP_ADJ_SHIFT)
| (0xA << USB3_GEN2_SET0_G2_TX_EMPH_AMP_SHIFT)
| (1 << USB3_GEN2_SET0_G2_TX_EMPH_EN_SHIFT));
mv_u3d_phy_write(base, USB3_GEN2_SET0, val);
udelay(100);
mv_u3d_phy_read(base, USB3_TX_EMPPH);
val &= ~(USB3_TX_EMPPH_AMP_MASK
| USB3_TX_EMPPH_EN_MASK
| USB3_TX_EMPPH_AMP_FORCE_MASK
| USB3_TX_EMPPH_PAR1_MASK
| USB3_TX_EMPPH_PAR2_MASK);
val |= ((0xB << USB3_TX_EMPPH_AMP_SHIFT)
| (1 << USB3_TX_EMPPH_EN_SHIFT)
| (1 << USB3_TX_EMPPH_AMP_FORCE_SHIFT)
| (0x1C << USB3_TX_EMPPH_PAR1_SHIFT)
| (1 << USB3_TX_EMPPH_PAR2_SHIFT));
mv_u3d_phy_write(base, USB3_TX_EMPPH, val);
udelay(100);
val = mv_u3d_phy_read(base, USB3_GEN2_SET1);
val &= ~(USB3_GEN2_SET1_G2_RX_SELMUPI_MASK
| USB3_GEN2_SET1_G2_RX_SELMUPF_MASK
| USB3_GEN2_SET1_G2_RX_SELMUFI_MASK
| USB3_GEN2_SET1_G2_RX_SELMUFF_MASK);
val |= ((1 << USB3_GEN2_SET1_G2_RX_SELMUPI_SHIFT)
| (1 << USB3_GEN2_SET1_G2_RX_SELMUPF_SHIFT)
| (1 << USB3_GEN2_SET1_G2_RX_SELMUFI_SHIFT)
| (1 << USB3_GEN2_SET1_G2_RX_SELMUFF_SHIFT));
mv_u3d_phy_write(base, USB3_GEN2_SET1, val);
udelay(100);
val = mv_u3d_phy_read(base, USB3_DIGITAL_LOOPBACK_EN);
val &= ~USB3_DIGITAL_LOOPBACK_EN_SEL_BITS_MASK;
val |= 1 << USB3_DIGITAL_LOOPBACK_EN_SEL_BITS_SHIFT;
mv_u3d_phy_write(base, USB3_DIGITAL_LOOPBACK_EN, val);
udelay(100);
//.........这里部分代码省略.........
开发者ID:7799, 项目名称:linux, 代码行数:101, 代码来源:phy-mv-u3d-usb.c
示例15: nmdk_timer_init
void __init nmdk_timer_init(void)
{
unsigned long rate;
struct clk *clk0;
struct clk *clk1;
u32 cr;
clk0 = clk_get_sys("mtu0", NULL);
BUG_ON(IS_ERR(clk0));
clk1 = clk_get_sys("mtu1", NULL);
BUG_ON(IS_ERR(clk1));
clk_enable(clk0);
clk_enable(clk1);
/*
* Tick rate is 2.4MHz for Nomadik and 110MHz for ux500:
* use a divide-by-16 counter if it's more than 16MHz
*/
cr = MTU_CRn_32BITS;;
rate = clk_get_rate(clk0);
if (rate > 16 << 20) {
rate /= 16;
cr |= MTU_CRn_PRESCALE_16;
} else {
cr |= MTU_CRn_PRESCALE_1;
}
clocksource_calc_mult_shift(&nmdk_clksrc, rate, MTU_MIN_RANGE);
/* Timer 0 is the free running clocksource */
writel(cr, mtu_base + MTU_CR(0));
writel(0, mtu_base + MTU_LR(0));
writel(0, mtu_base + MTU_BGLR(0));
writel(cr | MTU_CRn_ENA, mtu_base + MTU_CR(0));
/* Now the scheduling clock is ready */
nmdk_clksrc.read = nmdk_read_timer;
if (clocksource_register(&nmdk_clksrc))
pr_err("timer: failed to initialize clock source %s\n",
nmdk_clksrc.name);
/* Timer 1 is used for events, fix according to rate */
cr = MTU_CRn_32BITS;
rate = clk_get_rate(clk1);
if (rate > 16 << 20) {
rate /= 16;
cr |= MTU_CRn_PRESCALE_16;
} else {
cr |= MTU_CRn_PRESCALE_1;
}
clockevents_calc_mult_shift(&nmdk_clkevt, rate, MTU_MIN_RANGE);
writel(cr | MTU_CRn_ONESHOT, mtu_base + MTU_CR(1)); /* off, currently */
nmdk_clkevt.max_delta_ns =
clockevent_delta2ns(0xffffffff, &nmdk_clkevt);
nmdk_clkevt.min_delta_ns =
clockevent_delta2ns(0x00000002, &nmdk_clkevt);
nmdk_clkevt.cpumask = cpumask_of(0);
/* Register irq and clockevents */
setup_irq(IRQ_MTU0, &nmdk_timer_irq);
clockevents_register_device(&nmdk_clkevt);
}
开发者ID:sobczyk, 项目名称:linux-2.6, 代码行数:66, 代码来源:timer.c
示例16: fimg2d_clk_on
void fimg2d_clk_on(struct fimg2d_control *ctrl)
{
clk_enable(ctrl->clock);
fimg2d_debug("%s : clock enable\n", __func__);
}
开发者ID:Svard73, 项目名称:SM-T700-T705-Kernel, 代码行数:5, 代码来源:fimg2d_clk.c
示例17: res_trk_disable_videocore
static u32 res_trk_disable_videocore(void)
{
int rc = -1;
mutex_lock(&resource_context.lock);
if (!resource_context.rail_enabled) {
mutex_unlock(&resource_context.lock);
return false;
}
if (!resource_context.clock_enabled &&
resource_context.pclk &&
resource_context.hclk &&
resource_context.hclk_div2) {
VCDRES_MSG_LOW("\nEnabling clk before disabling pwr rail\n");
if (clk_set_rate(resource_context.hclk,
mfc_clk_freq_table[0])) {
VCDRES_MSG_ERROR("\n pwr_rail_disable:"
" set clk rate failed\n");
goto bail_out;
}
if (clk_enable(resource_context.pclk)) {
VCDRES_MSG_ERROR("vidc pclk Enable failed\n");
goto bail_out;
}
if (clk_enable(resource_context.hclk)) {
VCDRES_MSG_ERROR("vidc hclk Enable failed\n");
goto disable_pclk;
}
if (clk_enable(resource_context.hclk_div2)) {
VCDRES_MSG_ERROR("vidc hclk_div2 Enable failed\n");
goto disable_hclk;
}
} else {
VCDRES_MSG_ERROR("\ndisabling pwr rail: Enabling clk failed\n");
goto bail_out;
}
resource_context.rail_enabled = 0;
rc = clk_reset(resource_context.pclk, CLK_RESET_ASSERT);
if (rc) {
VCDRES_MSG_ERROR("\n clk_reset failed %d\n", rc);
mutex_unlock(&resource_context.lock);
return false;
}
msleep(20);
clk_disable(resource_context.pclk);
clk_disable(resource_context.hclk);
clk_disable(resource_context.hclk_div2);
clk_put(resource_context.hclk_div2);
clk_put(resource_context.hclk);
clk_put(resource_context.pclk);
rc = regulator_disable(resource_context.regulator);
if (rc) {
VCDRES_MSG_ERROR("\n regulator disable failed %d\n", rc);
mutex_unlock(&resource_context.lock);
return false;
}
resource_context.hclk_div2 = NULL;
resource_context.hclk = NULL;
resource_context.pclk = NULL;
mutex_unlock(&resource_context.lock);
return true;
disable_hclk:
clk_disable(resource_context.hclk);
disable_pclk:
clk_disable(resource_context.pclk);
bail_out:
if (resource_context.pclk) {
clk_put(resource_context.pclk);
resource_context.pclk = NULL;
}
if (resource_context.hclk) {
clk_put(resource_context.hclk);
resource_context.hclk = NULL;
}
if (resource_context.hclk_div2) {
clk_put(resource_context.hclk_div2);
resource_context.hclk_div2 = NULL;
}
mutex_unlock(&resource_context.lock);
return false;
}
开发者ID:mifl, 项目名称:android_kernel_pantech_msm8660-common, 代码行数:94, 代码来源:vcd_res_tracker.c
示例18: s3c2410ts_probe
static int __init s3c2410ts_probe(struct platform_device *pdev)
{
int rc;
struct s3c2410_ts_mach_info *info;
struct input_dev *input_dev;
int ret = 0;
dev_info(&pdev->dev, "Starting\n");
info = (struct s3c2410_ts_mach_info *)pdev->dev.platform_data;
if (!info)
{
dev_err(&pdev->dev, "Hm... too bad: no platform data for ts\n");
return -EINVAL;
}
#ifdef CONFIG_TOUCHSCREEN_S3C2410_DEBUG
printk(DEBUG_LVL "Entering s3c2410ts_init\n");
#endif
adc_clock = clk_get(NULL, "adc");
if (!adc_clock) {
dev_err(&pdev->dev, "failed to get adc clock source\n");
return -ENOENT;
}
clk_enable(adc_clock);
#ifdef CONFIG_TOUCHSCREEN_S3C2410_DEBUG
printk(DEBUG_LVL "got and enabled clock\n");
#endif
base_addr = ioremap(S3C2410_PA_ADC,0x20);
if (base_addr == NULL) {
dev_err(&pdev->dev, "Failed to remap register block\n");
ret = -ENOMEM;
goto bail0;
}
/* If we acutally are a S3C2410: Configure GPIOs */
if (!strcmp(pdev->name, "s3c2410-ts"))
s3c2410_ts_connect();
if ((info->presc & 0xff) > 0)
writel(S3C2410_ADCCON_PRSCEN |
S3C2410_ADCCON_PRSCVL(info->presc&0xFF),
base_addr + S3C2410_ADCCON);
else
writel(0, base_addr+S3C2410_ADCCON);
/* Initialise registers */
if ((info->delay & 0xffff) > 0)
writel(info->delay & 0xffff, base_addr + S3C2410_ADCDLY);
writel(WAIT4INT(0), base_addr + S3C2410_ADCTSC);
/* Initialise input stuff */
memset(&ts, 0, sizeof(struct s3c2410ts));
input_dev = input_allocate_device();
if (!input_dev) {
dev_err(&pdev->dev, "Unable to allocate the input device\n");
ret = -ENOMEM;
goto bail1;
}
ts.dev = input_dev;
ts.dev->evbit[0] = BIT_MASK(EV_SYN) | BIT_MASK(EV_KEY) |
BIT_MASK(EV_ABS);
ts.dev->keybit[BIT_WORD(BTN_TOUCH)] = BIT_MASK(BTN_TOUCH);
input_set_abs_params(ts.dev, ABS_X, 0, 0x3FF, 0, 0);
input_set_abs_params(ts.dev, ABS_Y, 0, 0x3FF, 0, 0);
input_set_abs_params(ts.dev, ABS_PRESSURE, 0, 1, 0, 0);
ts.dev->name = s3c2410ts_name;
ts.dev->id.bustype = BUS_RS232;
ts.dev->id.vendor = 0xDEAD;
ts.dev->id.product = 0xBEEF;
ts.dev->id.version = S3C2410TSVERSION;
ts.state = TS_STATE_STANDBY;
ts.event_fifo = kfifo_alloc(TS_EVENT_FIFO_SIZE, GFP_KERNEL, NULL);
if (IS_ERR(ts.event_fifo)) {
ret = -EIO;
goto bail2;
}
/* create the filter chain set up for the 2 coordinates we produce */
ts.chain = ts_filter_chain_create(pdev, info->filter_config, 2);
if (IS_ERR(ts.chain))
goto bail2;
ts_filter_chain_clear(ts.chain);
/* Get irqs */
if (request_irq(IRQ_ADC, stylus_action, IRQF_SAMPLE_RANDOM,
"s3c2410_action", ts.dev)) {
dev_err(&pdev->dev, "Could not allocate ts IRQ_ADC !\n");
iounmap(base_addr);
//.........这里部分代码省略.........
开发者ID:gvsurenderreddy, 项目名称:openwrt-9, 代码行数:101, 代码来源:s3c2410_ts.c
示例19: tegra_asoc_utils_set_rate
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