本文整理汇总了C++中clkdev_add_table函数的典型用法代码示例。如果您正苦于以下问题:C++ clkdev_add_table函数的具体用法?C++ clkdev_add_table怎么用?C++ clkdev_add_table使用的例子?那么恭喜您, 这里精选的函数代码示例或许可以为您提供帮助。
在下文中一共展示了clkdev_add_table函数的20个代码示例,这些例子默认根据受欢迎程度排序。您可以为喜欢或者感觉有用的代码点赞,您的评价将有助于我们的系统推荐出更棒的C++代码示例。
示例1: at91sam9g45_register_clocks
static void __init at91sam9g45_register_clocks(void)
{
int i;
for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
clk_register(periph_clocks[i]);
clkdev_add_table(periph_clocks_lookups,
ARRAY_SIZE(periph_clocks_lookups));
clkdev_add_table(usart_clocks_lookups,
ARRAY_SIZE(usart_clocks_lookups));
clkdev_add_physbase(&twi0_clk, AT91SAM9G45_BASE_TWI0, NULL);
clkdev_add_physbase(&twi1_clk, AT91SAM9G45_BASE_TWI1, NULL);
clkdev_add_physbase(&pioA_clk, AT91SAM9G45_BASE_PIOA, NULL);
clkdev_add_physbase(&pioB_clk, AT91SAM9G45_BASE_PIOB, NULL);
clkdev_add_physbase(&pioC_clk, AT91SAM9G45_BASE_PIOC, NULL);
clkdev_add_physbase(&pioDE_clk, AT91SAM9G45_BASE_PIOD, NULL);
clkdev_add_physbase(&pioDE_clk, AT91SAM9G45_BASE_PIOE, NULL);
if (cpu_is_at91sam9m10() || cpu_is_at91sam9m11())
clk_register(&vdec_clk);
clk_register(&pck0);
clk_register(&pck1);
}
开发者ID:AubrCool,项目名称:barebox,代码行数:26,代码来源:at91sam9g45.c
示例2: pxa300_init
static int __init pxa300_init(void)
{
if (cpu_is_pxa300() || cpu_is_pxa310()) {
mfp_init_base(io_p2v(MFPR_BASE));
mfp_init_addr(pxa300_mfp_addr_map);
clkdev_add_table(ARRAY_AND_SIZE(common_clkregs));
}
if (cpu_is_pxa310()) {
mfp_init_addr(pxa310_mfp_addr_map);
clkdev_add_table(ARRAY_AND_SIZE(pxa310_clkregs));
}
return 0;
}
开发者ID:01org,项目名称:KVMGT-kernel,代码行数:15,代码来源:pxa300.c
示例3: at91sam9rl_register_clocks
static void __init at91sam9rl_register_clocks(void)
{
int i;
for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
clk_register(periph_clocks[i]);
clkdev_add_table(periph_clocks_lookups,
ARRAY_SIZE(periph_clocks_lookups));
clkdev_add_table(usart_clocks_lookups,
ARRAY_SIZE(usart_clocks_lookups));
clk_register(&pck0);
clk_register(&pck1);
}
开发者ID:1219231251,项目名称:linux,代码行数:15,代码来源:at91sam9rl.c
示例4: arch_clk_init
int __init arch_clk_init(void)
{
int k, ret = 0;
if (test_mode_pin(MODE_PIN0)) {
if (test_mode_pin(MODE_PIN1))
pll1_div = 3;
else
pll1_div = 4;
} else
pll1_div = 1;
for (k = 0; !ret && (k < ARRAY_SIZE(main_clks)); k++)
ret = clk_register(main_clks[k]);
clkdev_add_table(lookups, ARRAY_SIZE(lookups));
if (!ret)
ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table);
if (!ret)
ret = sh_clk_mstp_register(mstp_clks, MSTP_NR);
return ret;
}
开发者ID:03199618,项目名称:linux,代码行数:25,代码来源:clock-sh7264.c
示例5: v2m_dt_init_early
void __init v2m_dt_init_early(void)
{
struct device_node *node;
u32 dt_hbi;
node = of_find_compatible_node(NULL, NULL, "arm,vexpress-sysreg");
v2m_sysreg_base = of_iomap(node, 0);
if (WARN_ON(!v2m_sysreg_base))
return;
/* Confirm board type against DT property, if available */
if (of_property_read_u32(allnodes, "arm,hbi", &dt_hbi) == 0) {
u32 misc = readl(v2m_sysreg_base + V2M_SYS_MISC);
u32 id = readl(v2m_sysreg_base + (misc & SYS_MISC_MASTERSITE ?
V2M_SYS_PROCID1 : V2M_SYS_PROCID0));
u32 hbi = id & SYS_PROCIDx_HBI_MASK;
if (WARN_ON(dt_hbi != hbi))
pr_warning("vexpress: DT HBI (%x) is not matching "
"hardware (%x)!\n", dt_hbi, hbi);
}
clkdev_add_table(v2m_dt_lookups, ARRAY_SIZE(v2m_dt_lookups));
versatile_sched_clock_init(v2m_sysreg_base + V2M_SYS_24MHZ, 24000000);
}
开发者ID:Jackeagle,项目名称:android_kernel_sony_c2305,代码行数:25,代码来源:v2m.c
示例6: s3c64xx_register_clocks
/**
* s3c64xx_register_clocks - register clocks for s3c6400 and s3c6410
* @xtal: The rate for the clock crystal feeding the PLLs.
* @armclk_divlimit: Divisor mask for ARMCLK.
*
* Register the clocks for the S3C6400 and S3C6410 SoC range, such
* as ARMCLK as well as the necessary parent clocks.
*
* This call does not setup the clocks, which is left to the
* s3c64xx_setup_clocks() call which may be needed by the cpufreq
* or resume code to re-set the clocks if the bootloader has changed
* them.
*/
void __init s3c64xx_register_clocks(unsigned long xtal,
unsigned armclk_divlimit)
{
unsigned int cnt;
armclk_mask = armclk_divlimit;
s3c24xx_register_baseclocks(xtal);
s3c24xx_register_clocks(clks, ARRAY_SIZE(clks));
s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
s3c24xx_register_clocks(clk_cdev, ARRAY_SIZE(clk_cdev));
for (cnt = 0; cnt < ARRAY_SIZE(clk_cdev); cnt++)
s3c_disable_clocks(clk_cdev[cnt], 1);
s3c24xx_register_clocks(clks1, ARRAY_SIZE(clks1));
s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
for (cnt = 0; cnt < ARRAY_SIZE(clksrc_cdev); cnt++)
s3c_register_clksrc(clksrc_cdev[cnt], 1);
clkdev_add_table(s3c64xx_clk_lookup, ARRAY_SIZE(s3c64xx_clk_lookup));
s3c_pwmclk_init();
}
开发者ID:Lord-Devices,项目名称:cm_kernel_samsung_hlte,代码行数:40,代码来源:clock.c
示例7: s5p6440_register_clocks
void __init s5p6440_register_clocks(void)
{
int ptr;
unsigned int cnt;
s3c24xx_register_clocks(clks, ARRAY_SIZE(clks));
for (ptr = 0; ptr < ARRAY_SIZE(sysclks); ptr++)
s3c_register_clksrc(sysclks[ptr], 1);
s3c24xx_register_clocks(clk_cdev, ARRAY_SIZE(clk_cdev));
for (cnt = 0; cnt < ARRAY_SIZE(clk_cdev); cnt++)
s3c_disable_clocks(clk_cdev[cnt], 1);
s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
for (ptr = 0; ptr < ARRAY_SIZE(clksrc_cdev); ptr++)
s3c_register_clksrc(clksrc_cdev[ptr], 1);
s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
clkdev_add_table(s5p6440_clk_lookup, ARRAY_SIZE(s5p6440_clk_lookup));
s3c24xx_register_clock(&dummy_apb_pclk);
}
开发者ID:01org,项目名称:KVMGT-kernel,代码行数:25,代码来源:clock-s5p6440.c
示例8: pxa95x_init
static int __init pxa95x_init(void)
{
int ret = 0, i;
if (cpu_is_pxa95x()) {
mfp_init_base(io_p2v(MFPR_BASE));
mfp_init_addr(pxa95x_mfp_addr_map);
reset_status = ARSR;
/*
* clear RDH bit every time after reset
*
* Note: the last 3 bits DxS are write-1-to-clear so carefully
* preserve them here in case they will be referenced later
*/
ASCR &= ~(ASCR_RDH | ASCR_D1S | ASCR_D2S | ASCR_D3S);
clkdev_add_table(pxa95x_clkregs, ARRAY_SIZE(pxa95x_clkregs));
if ((ret = pxa_init_dma(IRQ_DMA, 32)))
return ret;
register_syscore_ops(&pxa_irq_syscore_ops);
register_syscore_ops(&pxa_gpio_syscore_ops);
register_syscore_ops(&pxa3xx_clock_syscore_ops);
ret = platform_add_devices(devices, ARRAY_SIZE(devices));
}
return ret;
}
开发者ID:007kumarraja,项目名称:rockchip-rk3188-mk908,代码行数:32,代码来源:pxa95x.c
示例9: s5pv210_register_clocks
void __init s5pv210_register_clocks(void)
{
int ptr;
s3c24xx_register_clocks(clks, ARRAY_SIZE(clks));
for (ptr = 0; ptr < ARRAY_SIZE(sysclks); ptr++)
s3c_register_clksrc(sysclks[ptr], 1);
for (ptr = 0; ptr < ARRAY_SIZE(sclk_tv); ptr++)
s3c_register_clksrc(sclk_tv[ptr], 1);
for (ptr = 0; ptr < ARRAY_SIZE(clksrc_cdev); ptr++)
s3c_register_clksrc(clksrc_cdev[ptr], 1);
s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
clkdev_add_table(s5pv210_clk_lookup, ARRAY_SIZE(s5pv210_clk_lookup));
s3c24xx_register_clocks(clk_cdev, ARRAY_SIZE(clk_cdev));
for (ptr = 0; ptr < ARRAY_SIZE(clk_cdev); ptr++)
s3c_disable_clocks(clk_cdev[ptr], 1);
s3c24xx_register_clock(&dummy_apb_pclk);
s3c_pwmclk_init();
}
开发者ID:Jackeagle,项目名称:android_kernel_sony_c2305,代码行数:29,代码来源:clock.c
示例10: msm_clock_init
void __init msm_clock_init(struct clock_init_data *data)
{
unsigned n;
struct clk_lookup *clock_tbl;
size_t num_clocks;
clk_init_data = data;
if (clk_init_data->pre_init)
clk_init_data->pre_init();
clock_tbl = data->table;
num_clocks = data->size;
for (n = 0; n < num_clocks; n++) {
struct clk *clk = clock_tbl[n].clk;
struct clk *parent = clk_get_parent(clk);
if (parent && list_empty(&clk->siblings))
list_add(&clk->siblings, &parent->children);
if (clk->ops->handoff && !(clk->flags & CLKFLAG_HANDOFF_RATE)) {
if (clk->ops->handoff(clk)) {
clk->flags |= CLKFLAG_HANDOFF_RATE;
clk_prepare_enable(clk);
}
}
}
clkdev_add_table(clock_tbl, num_clocks);
if (clk_init_data->post_init)
clk_init_data->post_init();
}
开发者ID:maikelwever,项目名称:android_kernel_htc_msm8660-caf,代码行数:31,代码来源:clock.c
示例11: arch_clk_init
int __init arch_clk_init(void)
{
int k, ret = 0;
/* autodetect extal or fll configuration */
if (__raw_readl(PLLCR) & 0x1000)
pll_clk.parent = &fll_clk;
else
pll_clk.parent = &extal_clk;
for (k = 0; !ret && (k < ARRAY_SIZE(main_clks)); k++)
ret = clk_register(main_clks[k]);
clkdev_add_table(lookups, ARRAY_SIZE(lookups));
if (!ret)
ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table);
if (!ret)
ret = sh_clk_div6_reparent_register(div6_clks, DIV6_NR);
if (!ret)
ret = sh_clk_mstp_register(mstp_clks, HWBLK_NR);
return ret;
}
开发者ID:0x000000FF,项目名称:Linux4Edison,代码行数:26,代码来源:clock-sh7724.c
示例12: exynos5_register_clocks
void __init exynos5_register_clocks(void)
{
int ptr;
s3c24xx_register_clocks(exynos5_clks, ARRAY_SIZE(exynos5_clks));
for (ptr = 0; ptr < ARRAY_SIZE(exynos5_sysclks); ptr++)
s3c_register_clksrc(exynos5_sysclks[ptr], 1);
for (ptr = 0; ptr < ARRAY_SIZE(exynos5_sclk_tv); ptr++)
s3c_register_clksrc(exynos5_sclk_tv[ptr], 1);
for (ptr = 0; ptr < ARRAY_SIZE(exynos5_clksrc_cdev); ptr++)
s3c_register_clksrc(exynos5_clksrc_cdev[ptr], 1);
s3c_register_clksrc(exynos5_clksrcs, ARRAY_SIZE(exynos5_clksrcs));
s3c_register_clocks(exynos5_init_clocks_on, ARRAY_SIZE(exynos5_init_clocks_on));
s3c24xx_register_clocks(exynos5_clk_cdev, ARRAY_SIZE(exynos5_clk_cdev));
for (ptr = 0; ptr < ARRAY_SIZE(exynos5_clk_cdev); ptr++)
s3c_disable_clocks(exynos5_clk_cdev[ptr], 1);
s3c_register_clocks(exynos5_init_clocks_off, ARRAY_SIZE(exynos5_init_clocks_off));
s3c_disable_clocks(exynos5_init_clocks_off, ARRAY_SIZE(exynos5_init_clocks_off));
clkdev_add_table(exynos5_clk_lookup, ARRAY_SIZE(exynos5_clk_lookup));
register_syscore_ops(&exynos5_clock_syscore_ops);
s3c_pwmclk_init();
}
开发者ID:Blackburn29,项目名称:PsycoKernel,代码行数:29,代码来源:clock-exynos5.c
示例13: msm_clock_init
void __init msm_clock_init(struct clock_init_data *data)
{
unsigned n;
struct clk_lookup *clock_tbl;
size_t num_clocks;
clk_init_data = data;
if (clk_init_data->init)
clk_init_data->init();
clock_tbl = data->table;
num_clocks = data->size;
for (n = 0; n < num_clocks; n++) {
struct clk *clk = clock_tbl[n].clk;
struct clk *parent = clk_get_parent(clk);
clk_set_parent(clk, parent);
if (clk->ops->handoff && !(clk->flags & CLKFLAG_HANDOFF_RATE)) {
if (clk->ops->handoff(clk)) {
clk->flags |= CLKFLAG_HANDOFF_RATE;
clk_enable(clk);
}
}
}
clkdev_add_table(clock_tbl, num_clocks);
}
开发者ID:1111saeid,项目名称:jb_kernel_3.0.16_htc_golfu,代码行数:27,代码来源:clock.c
示例14: s3c2443_init_clocks
void __init s3c2443_init_clocks(int xtal)
{
unsigned long epllcon = __raw_readl(S3C2443_EPLLCON);
int ptr;
clk_epll.rate = s3c2443_get_epll(epllcon, xtal);
clk_epll.parent = &clk_epllref.clk;
s3c2443_common_init_clocks(xtal, s3c2443_get_mpll,
armdiv, ARRAY_SIZE(armdiv),
S3C2443_CLKDIV0_ARMDIV_MASK);
s3c24xx_register_clocks(clks, ARRAY_SIZE(clks));
for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++)
s3c_register_clksrc(clksrcs[ptr], 1);
/* We must be careful disabling the clocks we are not intending to
* be using at boot time, as subsystems such as the LCD which do
* their own DMA requests to the bus can cause the system to lockup
* if they where in the middle of requesting bus access.
*
* Disabling the LCD clock if the LCD is active is very dangerous,
* and therefore the bootloader should be careful to not enable
* the LCD clock if it is not needed.
*/
/* install (and disable) the clocks we do not need immediately */
s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
clkdev_add_table(s3c2443_clk_lookup, ARRAY_SIZE(s3c2443_clk_lookup));
s3c_pwmclk_init();
}
开发者ID:4atty,项目名称:linux,代码行数:35,代码来源:clock-s3c2443.c
示例15: arch_clk_init
int __init arch_clk_init(void)
{
int k, ret = 0;
if (__raw_readl(PLLCR) & 0x1000)
pll_clk.parent = &dll_clk;
else
pll_clk.parent = &extal_clk;
for (k = 0; !ret && (k < ARRAY_SIZE(main_clks)); k++)
ret = clk_register(main_clks[k]);
clkdev_add_table(lookups, ARRAY_SIZE(lookups));
if (!ret)
ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table);
if (!ret)
ret = sh_clk_div6_register(div6_clks, DIV6_NR);
if (!ret)
ret = sh_clk_mstp32_register(mstp_clks, MSTP_NR);
return ret;
}
开发者ID:DirtyDroidX,项目名称:android_kernel_htc_m8ul,代码行数:26,代码来源:clock-sh7343.c
示例16: pxa95x_init
static int __init pxa95x_init(void)
{
int ret = 0, i;
if (cpu_is_pxa95x()) {
mfp_init_base(io_p2v(MFPR_BASE));
mfp_init_addr(pxa95x_mfp_addr_map);
reset_status = ARSR;
/*
*/
ASCR &= ~(ASCR_RDH | ASCR_D1S | ASCR_D2S | ASCR_D3S);
clkdev_add_table(pxa95x_clkregs, ARRAY_SIZE(pxa95x_clkregs));
if ((ret = pxa_init_dma(IRQ_DMA, 32)))
return ret;
register_syscore_ops(&pxa_irq_syscore_ops);
register_syscore_ops(&pxa3xx_clock_syscore_ops);
ret = platform_add_devices(devices, ARRAY_SIZE(devices));
}
return ret;
}
开发者ID:romanbb,项目名称:android_kernel_lge_d851,代码行数:31,代码来源:pxa95x.c
示例17: r8a7779_clock_init
void __init r8a7779_clock_init(void)
{
u32 mode = r8a7779_read_mode_pins();
int k, ret = 0;
if (mode & MD(1)) {
plla_clk.rate = 1500000000;
SH_CLK_SET_RATIO(&clkz_clk_ratio, 2, 3);
SH_CLK_SET_RATIO(&clkzs_clk_ratio, 1, 6);
SH_CLK_SET_RATIO(&clki_clk_ratio, 1, 2);
SH_CLK_SET_RATIO(&clks_clk_ratio, 1, 6);
SH_CLK_SET_RATIO(&clks1_clk_ratio, 1, 12);
SH_CLK_SET_RATIO(&clks3_clk_ratio, 1, 8);
SH_CLK_SET_RATIO(&clks4_clk_ratio, 1, 16);
SH_CLK_SET_RATIO(&clkp_clk_ratio, 1, 24);
SH_CLK_SET_RATIO(&clkg_clk_ratio, 1, 24);
if (mode & MD(2)) {
SH_CLK_SET_RATIO(&clkb_clk_ratio, 1, 36);
SH_CLK_SET_RATIO(&clkout_clk_ratio, 1, 36);
} else {
SH_CLK_SET_RATIO(&clkb_clk_ratio, 1, 24);
SH_CLK_SET_RATIO(&clkout_clk_ratio, 1, 24);
}
} else {
plla_clk.rate = 1600000000;
SH_CLK_SET_RATIO(&clkz_clk_ratio, 1, 2);
SH_CLK_SET_RATIO(&clkzs_clk_ratio, 1, 8);
SH_CLK_SET_RATIO(&clki_clk_ratio, 1, 2);
SH_CLK_SET_RATIO(&clks_clk_ratio, 1, 8);
SH_CLK_SET_RATIO(&clks1_clk_ratio, 1, 16);
SH_CLK_SET_RATIO(&clks3_clk_ratio, 1, 8);
SH_CLK_SET_RATIO(&clks4_clk_ratio, 1, 16);
SH_CLK_SET_RATIO(&clkp_clk_ratio, 1, 32);
SH_CLK_SET_RATIO(&clkg_clk_ratio, 1, 24);
if (mode & MD(2)) {
SH_CLK_SET_RATIO(&clkb_clk_ratio, 1, 32);
SH_CLK_SET_RATIO(&clkout_clk_ratio, 1, 32);
} else {
SH_CLK_SET_RATIO(&clkb_clk_ratio, 1, 24);
SH_CLK_SET_RATIO(&clkout_clk_ratio, 1, 24);
}
}
for (k = 0; !ret && (k < ARRAY_SIZE(main_clks)); k++)
ret = clk_register(main_clks[k]);
if (!ret)
ret = sh_clk_mstp_register(mstp_clks, MSTP_NR);
clkdev_add_table(lookups, ARRAY_SIZE(lookups));
if (!ret)
shmobile_clk_init();
else
panic("failed to setup r8a7779 clocks\n");
}
开发者ID:01org,项目名称:prd,代码行数:58,代码来源:clock-r8a7779.c
示例18: versatile_init_early
/* Early initializations */
void __init versatile_init_early(void)
{
void __iomem *sys = __io_address(VERSATILE_SYS_BASE);
osc4_clk.vcoreg = sys + VERSATILE_SYS_OSCCLCD_OFFSET;
clkdev_add_table(lookups, ARRAY_SIZE(lookups));
versatile_sched_clock_init(sys + VERSATILE_SYS_24MHz_OFFSET, 24000000);
}
开发者ID:CSCLOG,项目名称:beaglebone,代码行数:10,代码来源:core.c
示例19: at91sam9g45_register_clocks
static void __init at91sam9g45_register_clocks(void)
{
int i;
for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
clk_register(periph_clocks[i]);
clkdev_add_table(periph_clocks_lookups,
ARRAY_SIZE(periph_clocks_lookups));
clkdev_add_table(usart_clocks_lookups,
ARRAY_SIZE(usart_clocks_lookups));
if (cpu_is_at91sam9m10() || cpu_is_at91sam9m11())
clk_register(&vdec_clk);
clk_register(&pck0);
clk_register(&pck1);
}
开发者ID:1219231251,项目名称:linux,代码行数:18,代码来源:at91sam9g45.c
示例20: s3c2410_init_clocks
void __init s3c2410_init_clocks(int xtal)
{
s3c24xx_register_baseclocks(xtal);
s3c2410_setup_clocks();
s3c2410_baseclk_add();
s3c24xx_register_clock(&s3c2410_armclk);
clkdev_add_table(s3c2410_clk_lookup, ARRAY_SIZE(s3c2410_clk_lookup));
samsung_wdt_reset_init(S3C24XX_VA_WATCHDOG);
}
开发者ID:03199618,项目名称:linux,代码行数:9,代码来源:s3c2410.c
注:本文中的clkdev_add_table函数示例由纯净天空整理自Github/MSDocs等源码及文档管理平台,相关代码片段筛选自各路编程大神贡献的开源项目,源码版权归原作者所有,传播和使用请参考对应项目的License;未经允许,请勿转载。 |
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